Read lock miss control and queue management
AssigneeIntel Corporation
InventorsGilbert Wolrich, Daniel Cutter, William Wheeler, Matthew J. Adiletta, Debra Bernstein
Life of this patent
Estimating the term…
Abstract
Managing memory access to random access memory includes fetching a read lock memory reference request and placing the read lock memory reference request at the end of a read lock miss queue if (1) the read lock memory reference request is requesting access to an unlocked memory location and (2) the read lock miss queue contains at least one read lock memory reference request.
Claims24
A method of managing memory access to random access memory comprises:
- fetching a read lock memory reference request;
- and
- placing the read lock memory reference request at the end of a read lock miss queue if the read lock memory reference request is requesting access to an unlocked memory location and the read lock miss queue contains at least one read lock memory reference request.
An article comprising a computer-readable medium which stores computer-executable instructions for managing memory access to random access memory, the instructions causing a computer to:
- fetch a read lock memory reference request;
- and
- place the read lock memory reference request at the end of a read lock miss queue if the read lock memory reference request is requesting access to an unlocked memory location and the read lock miss queue contains at least one read lock memory reference request.
A controller for managing access to random access memory comprises:
- an address content addressable memory that supports locked locations in memory;
- and
- a read lock miss queue that stores read lock memory reference requests that request access to memory locations unlocked in the address content addressable memory when the read lock miss queue contains at least one entry.
Dependencies are inferred from the claim text.