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AssigneeOak Technology, Inc.
InventorsSteven E. Olson, Ning Zhou
Estimating the term…
A computer system, bus interface unit, and method is provided for noting a control block transfer at which an interrupt occurs. The control block is but one control block within a chain of control blocks necessary to effectuate a chain of DMA transfers. If the control block undergoes an interrupt, that control block must be noted and control information associated therewith placed within a register so that when the DMA transfers are resumed, that control block can be immediately pointed to rather than having to initiate the first control block of the chain up to and including the control block undergoing interrupt. By purposely programming interrupts within the tag field of select control blocks and maintaining a software tag register within system memory, a control block within an expanded number of control blocks within a chain can be kept track of and pointed to following an error-induced interrupt. The software-induced interrupts are therefore purposely distinguishable from error-induced interrupts, and are used to extend the range of the hardware tag register normally fixed in size within the DMA controller.
A computer system, comprising a bus interface unit operably linked between a processor, a system memory and a peripheral device for transferring a chain of direct memory access (DMA) cycles from the peripheral device to the system memory and storing an identifier of a DMA cycle into storage devices within both the bus interface unit and the system memory at a time in which an interrupt is forwarded to the processor, wherein the identifier of the DMA cycle comprises a tag field value and a software tag value.
An apparatus, comprising:
A method for controlling the transfer of data associated with a chain of direct memory access (DMA) cycles, the method comprising:
Dependencies are inferred from the claim text.