US 6,324,234 B1 · Synchronization and clock recovery

Abstract

The present invention provides for joint estimation of data clock and frame timing in, for example, an M-ary phase-shift-keying (MPSK) signaling scheme with raised-cosine (RC) baseband pulse shaping. Asynchronous samples of the MPSK signal are obtained at a sampling rate greater than the Nyquist rate. A Fast Fourier Transform (FFT) processor processes the acquired samples, and the outcome is passed on to an absolute-value device followed by a peak detector. The present invention then operates to extract clock and frame information from the MPSK signal using a dotting pattern. In addition to clock recovery, the present invention provides for frame synchronization using the dotting pattern. The present invention thus eliminates the need for a long unique work (UW) frame synchronization pattern often included in the preamble of, for example, a time-division multiple-access (TDMA) signal to establish frame synchronization.

Claims3

Dependent claims

A data communication system comprising:

a transmitter for transmitting a signal through a transmission medium;
a receiver operable to receive said signal from said transmitter through said transmissions medium, said receiver having an estimator operable to jointly estimate data clock and frame timing in said received signal, wherein said estimator comprises:
a sampler operable to obtain asynchronous samples of said received signal;
an FFT processor for processing said asynchronous samples;
an absolute-value device for generating the absolute value of said processed samples;
a peak detector for detecting a maximum valued one of said absolute values of said processed samples;
and
an extractor operable to extract clock and frame information from said maximum valued absolute value.

5 more elements

Dependencies are inferred from the claim text.

Synchronization and clock recovery

Life of this patent

Synchronization and clock recovery

Life of this patent

Abstract

Claims3