Digital data reproducing apparatus and reproduction signal binarization level correcting method

A digital data reproduction apparatus, comprising:

• a detector for detecting digital data from a recording medium on which digital data is recorded;
• error signal production means for processing a signal from the detector so as to produce an error signal required for a control operation;
• control means for controlling the detector using the error signal;
• waveform equalization means for equalizing the signal from the detector;
• reproduced signal digitization means for converting a signal from the waveform equalization means to a digitized signal;
• synchronization means for producing a clock whose phase is synchronized with a leading edge and a trailing edge of the digitized signal which has been converted by the reproduced signal digitization means;
• and jitter detection means for integrating and thereby converting absolute values of phase errors between the digitized signal and the clock to a voltage value, wherein:
• the digital data reproduction apparatus further comprises correction means for correcting a detection sensitivity of the jitter detection means;
• and
• the correction means comprises:
• digitization level correction means for correcting a reproduced signal digitization level so as to minimize a signal produced by the jitter detection means;
• and
• sensitivity correction means for correcting the detection sensitivity of the jitter detection means using a signal from the digitization level correction means.

A digital data reproduction apparatus, comprising:

• a detector for detecting digital data from a recording medium on which digital data is recorded;
• error signal production means for processing a signal from the detector so as to produce an error signal required for a control operation;
• control means for controlling the detector using the error signal;
• waveform equalization means for equalizing the signal from the detector;
• reproduced signal digitization means for converting a signal from the waveform equalization means to a digitized signal;
• synchronization means for producing a clock whose phase is synchronized with a leading edge and a trailing edge of the digitized signal which has been converted by the reproduced signal digitization means;
• and jitter detection means for integrating and thereby converting absolute values of phase errors between the digitized signal and the clock to a voltage value, wherein:
• the digital data reproduction apparatus further comprises:
• digitization level correction means for correcting a reproduced signal digitization level so as to minimize a signal produced by the jitter detection means;
• and
• waveform equalization correction means for correcting waveform equalization coefficients of the waveform equalization means using a signal from the digitization level correction means.

A method for correcting a reproduced signal digitization level, the method comprising:

• a first step of obtaining a first jitter level and a second jitter level respectively corresponding to a first digitization level within a positive region and a second digitization level within a negative region, wherein the positive region is defined as a region of a level higher than a reference value of the reproduced signal digitization level, and the negative region is defined as a region of a level lower than the reference value;
• a second step of obtaining a first digitization level and a second digitization level at which the first jitter level and the second jitter level are equal to each other;
• and
• a third step of correcting the reproduced signal digitization level based on an optimal digitization level, the optimal digitization level being a median point between the first digitization level and the second digitization level.