Data input circuit of semiconductor memory device

Abstract

A data input circuit of a semiconductor memory device is disclosed. The data input circuit includes a control signal generation circuit, an internal strobe generation circuit and a data setup circuit. The control signal generation circuit generates a strobe control signal activated during input of data of the predetermined burst length. The internal strobe generation circuit generates an internal data strobe signal. The internal data strobe signal synchronizes with an external data strobe signal, and is disabled when data of the predetermined burst length is input. The data setup circuit converts sequentially input data to parallel data in response to the internal data strobe signal. According to the data input circuit and the data input method of the present invention, data of “high”-impedance cannot be input to the semiconductor memory device.

Dependencies are inferred from the claim text.