Interface circuit and method for writing data into a non-volatile memory, and scan register
AssigneeOki Electric Industry Co., Ltd.
InventorShozo Tomita
Life of this patent
Estimating the term…
Abstract
An interface circuit providing serial access to a non-volatile memory in an integrated circuit has at least two memory-access scan registers and at least one selection scan register coupled in common to a data input terminal of the integrated circuit. These registers are also coupled through a multiplexer to a data output terminal of the integrated circuit. The memory-access scan registers receive serial data such as address data and data to be written in the non-volatile memory at the specified addresses. The selection scan register receives a code for selecting the memory-access scan registers. Serial access to the non-volatile memory is speeded up because the memory-access scan registers can be accessed individually.
Claims15
An interface circuit for writing data into a non-volatile memory in an integrated circuit having a data input terminal and a data output terminal, comprising:
- a plurality of memory-access scan registers coupled in common to the data input terminal, for receiving serial input data related to access to the non-volatile memory from the data input terminal;
- at least one selection scan register coupled to the data input terminal, for receiving a code selecting at least one of the memory-access scan registers from the data input terminal;
- and
- at least one multiplexer coupling said memory-access scan registers and said at least one selection scan register to the data output terminal, for serial output of data from said memory-access scan registers and said at least one selection scan register to the data output terminal.
An interface circuit for writing data into a non-volatile memory of an integrated circuit having a data input terminal and a data output terminal, comprising:
- a plurality of memory-access scan registers coupled in common to the data input terminal, that receives serial input data related to access to the non-volatile memory from the data input terminal;
- at least one selection scan register coupled to the data input terminal, that receives a code selecting at least one of the memory-access scan registers from the input terminal;
- an instruction register that receives an instruction code as the serial input data received from the data input terminal, and that selects at least one of the memory-access scan registers together with the at least one selection scan register;
- and
- at least one multiplexer that couples the memory-access scan registers, the instruction register and the at least one selection scan register to the data output terminal, for serial output of data from the memory-access scan registers, the instruction register and the at least one selection scan register to the data output terminal.
Dependencies are inferred from the claim text.