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US 6,324,095 B1Granted
Low voltage flash EEPROM memory cell with improved data retention
AssigneeAgere Systems Guardian Corp.
InventorsRichard J. McPartland, Ranbir Singh
Life of this patent
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Abstract
The present invention provides memory circuit including a control input, a switch, and a voltage transfer structure including a linear capacitor that electrically couples the control input to the switch.
Claims16
A programmable read only memory (EPROM) cell, comprising:
- a control input;
- a metal oxide semiconductor (MOS) transistor switch device;
- a floating gate, which serves as a gate of the MOS switch device;
- and
- a voltage transfer structure connected to the control input wherein the voltage transfer structure includes a metal oxide semiconductor linear capacitor with source/drain to gate overlap capacitance that is substantially greater than a capacitance of a floating gate within the switch transistor and wherein the floating gate functions as a gate of the voltage transfer structure MOS capacitor.
2 more elements
A programmable read only memory (EPROM) cell, comprising:
- a control input;
- a metal oxide semiconductor (MOS) transistor switch device;
- a floating gate that serves as a gate of the MOS switch device;
- and
- a voltage transfer structure connected to the control input wherein the voltage transfer structure includes a linear capacitor with one terminal connected to a control input and another terminal connected to the floating gate and having a capacitance substantially greater than a capacitance of the floating gate.
2 more elements
Dependencies are inferred from the claim text.