Package of integrated circuits and vertical integration
AssigneeTru-Si Technologies, Inc.
InventorsOleg Siniaguine, Sergey Savastiouk
Life of this patent
Estimating the term…
Abstract
A first level packaging wafer is made of a semiconductor or insulating material. The bumps on the wafer are made using vertical integration technology, without solder or electroplating. More particularly, vias are etched part way into a first surface of the substrate. Metal is deposited into the vias. Then the substrate is blanket-etched from the back side until the metal is exposed and protrudes from the vias to form suitable bumps. Dicing methods and vertical integration methods are also provided. Solder or electroplating are used in some embodiments.
Claims29
A fabrication method comprising:
- forming one or more vias in a first side of a first substrate;
- forming a conductive contact in each of the vias so that each contact is not exposed on a second side of the first substrate;
- exposing each contact on the second side of the first substrate with a blanket process which includes removing material from the second side of the first substrate, wherein the blanket process causes each contact to protrude from the second side of the first substrate;
- and
- bonding at least one contact on the second side of the first substrate to a wiring substrate so that the first substrate or a portion thereof becomes directly attached to the wiring substrate, wherein the wiring substrate is a non-semiconductor substrate.
A method for fabricating a vertical integrated circuit, the method comprising:
- providing a vertically integrated stack of two or more structures M(1), . . . M(N), wherein each structure comprises one or more contacts directly attached to one or more contacts of another one of said structures, wherein the structure M(N) is an end structure in the stack, and the structure M(N) comprises a first side and a second side, the second side not being attached to any other one of said structures;
- processing the first side of the end structure M(N) of the stack with a blanket process comprising blanket removal of material from the second side, wherein the blanket process exposes one or more first contacts protruding from the second side by at least a predetermined amount.
A fabrication method comprising:
- providing a structure S1 comprising a semiconductor substrate with circuitry adjacent to a first side of the structure;
- removing material from a second side of the structure S1 to expose one or more first contact structures, wherein the material is removed at least until the one or more first contact structures protrude from the second side by at least a predetermined amount, and wherein the material removal is a blanket removal process;
- depositing flowable material on the second side, wherein the flowable material is dielectric when hardened;
- subjecting the flowable material to a blanket material-removal process at least until the one or more first contact structures protrude on the second side by at least a predetermined amount, so that after the removal the hardened flowable material covers the substrate on the second side.
A semiconductor fabrication method comprising:
- making one or more vias in a first side of a first semiconductor wafer along one or more scribe lines;
- bonding the first side of the first wafer to a second semiconductor wafer;
- and
- removing material from a second side of the first wafer until the vias become through holes.
A fabrication method comprising:
- forming one or more vias in a first side of a first substrate;
- forming a conductive contact in each of the vias so that each contact is not exposed on a second side of the first substrate;
- exposing each contact on the second side of the first substrate with a blanket process which includes removing material from the second side of the first substrate, wherein the blanket process causes each contact to protrude from the second side of the first substrate;
- and
- bonding at least one contact on the second side of the first substrate to a printed circuit board (PCB) so that the first substrate or a portion thereof becomes directly attached to the PCB.
A fabrication method comprising:
- forming one or more vias in a first side of a first substrate;
- forming a conductive contact in each of the vias so that each contact is not exposed on a second side of the first substrate;
- exposing each contact on the second side of the first substrate with a blanket process which includes removing material from the second side of the first substrate, wherein the blanket process causes each contact to protrude from the second side of the first substrate;
- and
- bonding at least one contact on the second side of the first substrate to a wiring substrate so that the first substrate or a portion thereof becomes directly attached to the wiring substrate, wherein the wiring substrate is a semiconductor substrate without any active devices.
A fabrication method comprising:
- forming one or more first vias in a first side of a first substrate;
- forming a first conductive contact in each of the first vias so that each first contact is not exposed on a second side of the first substrate;
- forming one or more second vias in a first side of a second substrate;
- forming a second conductive contact in each of the second vias so that each second contact is not exposed on a second side of the second substrate;
- attaching the first side of the first substrate to the first side of the second substrate;
- after the attaching operation, removing material from the second side of the first substrate to expose the one or more first contacts, and bonding the one or more exposed first contacts to one or more conductive contacts on a third substrate;
- and then
- removing material from the second side of the second substrate to expose the one or more second contacts, and bonding the one or more exposed second contacts to one or more conductive contacts on a fourth substrate.
Dependencies are inferred from the claim text.