Flexible control of access to basic input/output system memory
AssigneeIntel Corporation
InventorsAlbert R. Nelson, Peter A. Ward
Life of this patent
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Abstract
Flexible control of access to a Basic Input/Output System memory is provided by a programmable non-volatile storage unit that stores a non-volatile signal and generates a control signal based on the non-volatile signal. A control circuit coupled to the programmable non-volatile storage unit receives the control signal from the non-volatile storage unit. The control circuit also receives a BIOS memory address signal and generates a modified BIOS memory address signal. In this way, different BIOS programs may be accessed on boot-up.
Claims10
An apparatus to control access to a Basic Input/Output System (BIOS) memory unit, comprising:
- a memory address bus having a plurality of BIOS memory address lines;
- a programmable non-volatile storage unit configured to generate a control bit signal;
- a control circuit, coupled to said programmable non-volatile storage unit, responsive to (1) the control signal and (2) a BIOS memory address signal, wherein said control circuit is configured to selectively invert the BIOS memory address signal based on the control bit signal to generate a modified BIOS memory address signal to said memory unit;
- and
- wherein said control circuit is coupled to said memory address bus and the BIOS memory address signal is transferred by at least one of said BIOS memory address lines.
A method of controlling access to a Basic Input/Output System (BIOS) memory, comprising:
- receiving a control bit signal from a register;
- receiving a BIOS memory address signal;
- generating a modified BIOS memory address signal based on (1) the control bit signal received from a programmable non-volatile storage unit and (2) the BIOS memory address signal by selectively inverting the BIOS memory address, based on the control bit signal;
- and
- accessing said BIOS memory using said modified BIOS memory address signal.
An apparatus to control access to a Basic Input/Output System (BIOS) memory, comprising:
- a memory address bus;
- a processor coupled to said memory address bus;
- a programmable non-volatile storage unit that generates a control bit signal;
- a control circuit, coupled to said programmable non-volatile storage unit and to said memory address bus, that receives (1) the control signal from said programmable non-volatile storage unit and (2) a BIOS memory address signal from said memory address bus, said control circuit generates a modified BIOS memory address signal by selectively inverting the BIOS memory address, based on the control bit signal;
- and
- a BIOS memory unit, coupled to said control circuit, that receives the modified BIOS memory address signal.
Dependencies are inferred from the claim text.