Prefetch instruction specifying destination functional unit and read/write access mode
AssigneeAdvanced Micro Devices, Inc.
InventorDavid B. Witt
Life of this patent
Estimating the term…
Abstract
A microprocessor is configured to execute a prefetch instruction specifying a cache line to be transferred into the microprocessor, as well as an access mode for the cache line. The microprocessor includes caches optimized for the access modes. In one embodiment, the microprocessor includes functional units configured to operate upon various data type. Each different type of functional unit may be connected to different caches which are optimized for the various access modes. The prefetch instruction may include a functional unit specification in addition to the access mode. In this manner, data of a particular type may be prefetched into a cache local to a particular functional unit.
Claims20
A microprocessor comprising a plurality of functional units configured to execute instructions including a prefetch instruction, said prefetch instruction including:
- (i) a functional unit field identifying one of said plurality of functional units which is to operate upon data identified by said prefetch instruction;
- and
- (ii) a read/write specifier field indicating one of a read-only access mode, a read/write access mode, and a write-only access mode for said data;
- wherein said microprocessor is configured to prefetch said data in response to said prefetch instruction, and wherein said microprocessor further comprises at least three caches, and wherein said microprocessor is configured to store said data in one of said at least three caches responsive to said read/write specifier field.
A method comprising:
- executing a prefetch instruction identifying a cache line, said prefetch instruction including:
- (i) a functional unit field identifying one of a plurality of functional units which is to operate upon said cache line, and (ii) a read/write specifier field indicating one of a read-only access mode, a read/write access mode, and a write-only access mode for said cache line;
- fetching said cache line into said microprocessor responsive to said executing;
- storing said cache line in one of a plurality of caches coupled to said one of said plurality of functional units responsive to said read/write specifier field.
A computer system comprising:
- a microprocessor including a plurality of functional units configured to execute instructions including a prefetch instruction, said prefetch instruction including:
- (i) a functional unit field identifying one of said plurality of functional units which is to operate upon data identified by said prefetch instruction;
- and
- (ii) a read/write specifier field indicating one of a read-only access mode, a read/write access mode, and a write-only access mode for said data;
- wherein said microprocessor is configured to prefetch said data in response to said prefetch instruction, and wherein said microprocessor further comprises at least three caches, and wherein said microprocessor is configured to store said data in one of said at least three caches responsive to said read/write specifier field;
- and
- a memory coupled to said microprocessor and configured to store said data.
Dependencies are inferred from the claim text.