US 6,321,320 B1 · Flexible and programmable BIST engine for on-chip memory array testing and characterization

Abstract

A highly flexible and complex BIST engine provides at-speed access, testing, characterization, and monitoring of on-chip memory arrays, independent of other chip circuitry such as a CPU core. Each BIST engine has a main control block, at least one address generation block having an address local control block and one or more address-data generation blocks, and at least one data generation block having a data local control block and one or more data generation blocks. Each of the local address and data control blocks are programmed independently to define operations that will be performed by the individual address and data generation blocks, respectively. The main control block in turn controls operation of the local address and data control blocks to effect desired testing, accessing, and monitoring of the on-chip memory arrays.

Claims92

Dependent claims

A method of testing and monitoring arrays on an integrated circuit chip having a built-in-self-test (BIST) engine comprising one or more address generation blocks capable of being programmed with an address generation program, one or more data generation blocks capable of being programmed with a data generation program, and a main control block, said method comprising:

a) dynamically programming the one or more address generation blocks of the built-in-self-test (BIST) engine with the address generation program to selectively provide address information to one or more on-chip memory arrays;
b) dynamically programming the one or more data generation blocks of the BIST engine with the data generation program to selectively provide and receive data information to and from the one or more on-chip memory arrays;
and
c) dynamically programming the main control block of the BIST engine to coordinate when the one or more address generation blocks execute the address generation program and when the one or more data generation blocks execute the data generation program.

1 more element

A BIST engine that is capable of accessing, testing and monitoring on-chip arrays of an integrated circuit device, comprising:

a main control block;
one or more programmable address generation blocks controlled by the main control block to selectively provide address information to one or more on-chip memory arrays, comprising:
an address local control block having an address control register;
and
one or more address-data blocks having a plurality of address-data registers control led by the address control register to provide or monitor address information from either the one or more address generation block or a CPU of the integrated circuit device to one or more on-chip memory arrays to which the one or more address-data generation blocks are coupled in accordance with instructions programmed into the address control register;
and
one or more programmable data generation blocks controlled by the main control block to selectively provide and receive data information to and from the one or more on-chip memory arrays, comprising:
a data local control block having a data control register;
and
one or more data-data blocks having a plurality of data-data registers controlled by the data control register of the data local control block to provide or monitor data information from either the one or more data generation block or the CPU of the integrated circuit device to the one or more on-chip memory arrays to which the one or more data-data blocks are coupled in accordance with instructions programmed into the data control register and to receive information from the one or more on-chip memory arrays,
wherein the main control block is programmed by programming a main control register of the main control block to coordinate when the one or more address generation blocks and the one or more data generation blocks execute their programming.

8 more elements

Dependencies are inferred from the claim text.

Flexible and programmable BIST engine for on-chip memory array testing and characterization

Life of this patent

Flexible and programmable BIST engine for on-chip memory array testing and characterization

Life of this patent

Abstract

Claims92