Method, architecture and circuit for locking a data transmission frame
AssigneeCypress Semiconductor Corporation
InventorRobert G. Rundell
Life of this patent
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Abstract
A circuit comprising a first counter, a second counter, a third counter and a decoder, where the decoder may be configured to present a locked output signal. The first counter may present a first output signal in response to a start of frame signal and one or more control signals. The second counter may be configured to present a second output signal in response to the start of frame signal and the first output signal. The third counter may present a tracking control signal to the first counter in response to one or more of the control signals.
Claims19
A circuit comprising:
- a first counter configured to present a first output signal in response to an input signal and one or more control signals;
- a second counter configured to present a second output signal in response to said first output signal and said input signal;
- and
- a decoder configured to present (i) a locked output signal configured to be de-asserted in response to said input signal not being detected a predetermined number of times and (ii) said one or more control signals in response to said second output signal and said input signal, wherein said locked output signal indicates a data transmission frame is locked;
- and
- a third counter configured to present a tracking control signal to said first counter in response to one or more of said control signals.
A circuit comprising:
- means for generating a first counter output signal in response to an input signal and one or more control signals;
- means for generating a second output counter signal in response to said first output signal and said input signal;
- means for generating (i) a locked output signal configured to be de-asserted in response to said input signal not being detected a predetermined number of times and (ii) said one or more control signals in response to said second output signal and said input signal, wherein said locked output signal indicates a data transmission frame is locked;
- and
- means for generating a tracking control signal to said first counter in response to one or more of said control signals.
A method for locking a data transmission frame comprising the steps of:
- (A) generating a first counter output signal in response to an input signal and one or more control signals;
- (B) generating a second output counter signal in response to said first counter output signal and said input signal;
- (C) generating (i) a locked output signal configured to be de-asserted in response to said input signal not being detected a predetermined number of times and (ii) said one or more control signals in response to said second output signal and said input signal, wherein said locked output signal indicates a data transmission frame is locked;
- and
- (D) generating a tracking control signal in response to one or more of said control signals.
Dependencies are inferred from the claim text.