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US 6,320,790 B1Granted
Biasing stage for biasing the drain terminal of a nonvolatile memory cell during the read phase
AssigneeSTMicroelectronics S.r.l.
InventorRino Micheloni
Life of this patent
Estimating the term…
Abstract
The read circuit includes a biasing stage connected to the memory cell to be read and having the purpose of biasing the drain terminal of the memory cell at a preset operating potential, typically 1 V; and a regulating circuit connected to a supply line set at a supply voltage and supplying to the biasing stage a bias current which is stable as the temperature and the supply voltage vary.
Claims16
A read circuit for a nonvolatile memory comprising:
- a memory cell;
- a first reference line set at a first reference potential;
- a biasing stage connected to said memory cell for biasing a first terminal of the memory cell at a preset operating potential;
- and
- a regulating circuit connected to said first reference line for supplying to said biasing stage a bias current which is stable as the temperature and as said first reference potential vary.
2 more elements
A read circuit for a nonvolatile memory comprising:
- a memory cell;
- a first reference line set at a first reference potential;
- a biasing stage connected to said memory cell for biasing a first terminal of the memory cell at a preset operating potential;
- and
- a current generating circuit connected to said first reference line for supplying to said biasing stage a reference current which is stable as the temperature and as said first reference potential vary:
- and
- a stabilizing circuit arranged between said current generating circuit and said biasing stage for limiting the residual variations of said reference current caused by variations of said first reference potential and said temperature.
4 more elements
Dependencies are inferred from the claim text.