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US 6,320,785 B1Granted
Nonvolatile semiconductor memory device and data writing method therefor
AssigneesHitachi, Ltd., Hitachi ULSI Engineering Corp.
InventorsKeiichi Yoshida, Shooji Kubono
Life of this patent
Estimating the term…
Abstract
In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.
Claims20
A nonvolatile semiconductor memory device comprising:
- a plurality of data lines;
- a plurality of word lines;
- a plurality of memory cells, each of which is coupled to a corresponding data line and a corresponding word line, each of which includes a control gate and a floating gate, and each of which has a threshold voltage corresponding to data,
- wherein each of said plurality of memory cells has a threshold voltage in a first threshold voltage region as an erase state by executing an erase operation and has the threshold voltage in one of said first threshold voltage region, a second threshold voltage region and a third threshold voltage region by executing a write operation, and
- wherein an absolute value of the threshold voltage of said second threshold voltage region is between an absolute value of the threshold voltage of said first threshold voltage region and an absolute value of the threshold voltage of said third threshold voltage region;
- a plurality of data latch each of which is coupled to a corresponding data line and each of which store data to be written in memory cells coupled to a selected word line;
- and
- a write control circuit, which brings a threshold voltage of a first memory cell in said erase state and coupled to the selected word line to the threshold voltage in said third threshold voltage region and brings a threshold voltage of a second memory cell in said erase state and coupled to said selected word line in said second threshold voltage region thereafter, in accordance with data stored in said plurality of data latch, thereby to write in data corresponding to the threshold voltage in said third threshold voltage region to said first memory cell in said plurality of memory cells and to write in data corresponding to the threshold voltage in said second threshold voltage region to said second memory cell in said plurality of memory cells.
5 more elements
The nonvolatile semiconductor memory device comprising:
- a plurality of data lines;
- a plurality of word lines;
- a plurality of memory cells, each of which is coupled to a corresponding data line and a corresponding word line, each of which includes a control gate and a floating gate, and each of which has a threshold voltage corresponding to data,
- wherein each of said plurality of memory cells has one of a threshold voltage in a first threshold voltage region to be allocated as an erase state and a threshold voltage taken from among a plurality of threshold voltage regions which are, respectively, different from said first threshold voltage region and which are allocated as different write states;
- a plurality of data latch each of which is coupled to a corresponding data line and each of which stores data to be written in memory cells coupled to a selected word line;
- and
- a write control circuit controlling a writing operation for writing data stored in said plurality of data latch to memory cells coupled to the selected word line from said plurality of word lines,
- wherein a threshold voltage of a memory cell coupled to the selected word line is shifted from said first threshold voltage region to a second threshold voltage region, which is allocated as a write state, and followed by the shifting of a threshold voltage of another memory cell coupled to said selected word line from said first threshold voltage region to a third threshold voltage region, which is allocated as another write state, said third threshold voltage region is nearer than said second threshold voltage region to said first threshold voltage region in voltage potential.
5 more elements
A nonvolatile semiconductor memory device comprising:
- a plurality of data lines;
- a plurality of word lines;
- a plurality of memory cells, each of which is coupled to a corresponding data line and a corresponding word line, each of which includes a control gate and a floating gate, and each of which has a threshold voltage corresponding to multi-level data,
- a plurality of data latch each of which is coupled to a corresponding data line and each of which stores data to be written in memory cells coupled to a selected word line;
- and
- a write control circuit controlling a writing operation for writing data stored in said plurality of data latch to memory cells coupled to the selected word line from said plurality of word lines,
- wherein a threshold voltage of a memory cell coupled to the selected word line is shifted from said first threshold voltage region, which is allocated as an erase state, to a second threshold voltage region, which is allocated as a write state, and followed by the shifting of a threshold voltage of another memory cell coupled to said selected word line from said first threshold voltage region to a third threshold voltage region, which is allocated as another write state, said third threshold voltage region is nearer than said second threshold voltage region to said first threshold voltage region in voltage potential.
4 more elements
Dependencies are inferred from the claim text.