Semiconductor memory device and various systems mounting them
AssigneeKabushiki Kaisha Toshiba
InventorDaisaburo Takashima
Life of this patent
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Abstract
A semiconductor memory device comprises a plurality of memory cells each having a source terminal and a drain terminal and a ferroelectric capacitor having a first terminal connected to the source terminal, wherein the plurality of memory cells are connected in series, and one or more selected transistors connected to at least one terminal of the series connected memory cells to constitute a memory cell block, the memory cell block having one terminal connected to a bitline and another terminal connected to a plate electrode, and wherein two memory cell blocks, which are respectively connected to two bit lines forming a bit line pair and also connected to the same word line, are respectively connected to a first plate electrode and a second plate electrode.
Claims6
A mobile phone, comprising:
- a microprocessor for performing various arithmetic processing operations;
- a voice input device;
- a key input or a hand touch device;
- an antenna to output/input a radio wave;
- a sending/receiving device connected to said antenna to send/receive data;
- a display device connected to said microprocessor to display necessary information;
- and
- a semiconductor memory device connected to said microprocessor to read/write data,
- wherein said semiconductor memory device includes a plurality of memory cells each having a transistor, which has a source terminal and a drain terminal, and a ferroelectric capacitor, which has a first terminal connected to said source terminal and a second terminal connected to said drain terminal,
- a predetermined number of said memory cells are connected in series to constitute a memory cell block, and
- a plurality of said memory cell blocks are arranged to constitute a cell array.
Dependencies are inferred from the claim text.