Flicker filter circuit
AssigneeIntel Corporation
InventorHong Jiang
Life of this patent
Estimating the term…
Abstract
Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a flicker filter circuit. The flicker filter circuit has a configuration so that during filter operation two line buffers are employed to store partial sums of the filtered input digital signal samples. Briefly, in accordance with another embodiment of the invention, an integrated circuit includes: three line buffers, three multipliers, and three adders. The buffers, multipliers and adders are coupled in a circuit configuration so as to implement a flicker filter during circuit operation.
Claims17
An integrated circuit comprising:
- a flicker filter;
- said flicker filter having a configuration so that during filter operation
- at least two line buffers are employed to store partial sums of filtered input digital signal samples, and a third line buffer is employed to store digital signals samples produced during filter operation by interpolating separate sums of filtered digital signal samples.
An integrated circuit comprising:
- three line buffers, three multipliers and three adders coupled so as to implement a five-tap flicker filter during circuit operation;
- said flicker filter further including the capability to interpolate separate sums of input digital signal samples.
A method of implementing a flicker filter comprising:
- storing partial sums of filtered input digital signal samples in different buffers, interpolating filtered digital signal samples from partial sums of filtered digital signal samples.
Dependencies are inferred from the claim text.