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US 6,320,590 B1Granted
Data bus compressing apparatus
AssigneeLG. Philips LCD Co., Ltd.
InventorYong-Suk Go
Life of this patent
Estimating the term…
Abstract
A bus compression apparatus for compressing data is provided to suppress an EMI signal and to simplify a data bus structure. In the apparatus, the voltage levels of the digital output signals are summed in accordance with the resistance values of the data compression circuit to produce a compressed analog signal. The compressed analog signal is transmitted through a bus lines to a data decompressor which reproduces the digital data in response to the voltage levels of the compressed analog signal.
Claims6
A liquid crystal display comprising:
- a liquid crystal panel;
- driver integrated circuits for selectivity driving the liquid crystal panel with at least two bit data;
- signal input means for inputting an analog signal representing at least two bit data being compressed to form the analog signal;
- and
- bus decompressing means connected to the signal input means for decompressing the analog signal to generate two bit data and for supplying the decompressed two bit data to the driver integrated circuits,
- wherein the bus decompressing means is positioned within each one of the driver integrated circuits, and the signal input means is connected to the driver integrated circuits.
3 more elements
A liquid crystal display comprising:
- a liquid crystal panel;
- driver integrated circuits for selectivity driving the liquid crystal panel with at least two bit data;
- signal input means for inputting an analog signal representing at least two bit data being compressed to form the analog signal;
- and
- bus decompressing means connected to the signal input means for decompressing the analog signal to generate two bit data and for supplying the decompressed two bit data to the driver integrated circuits;
- wherein the bus decompressing means includes level detectors, inputs of which are connected to the analog signal and outputs are connected to a coding device, wherein each level detector is configured to detect different voltage levels of the analog signal;
- wherein each one of the level detectors comprises:
- a transistor controlled by the analog signal;
- and
- an output voltage controller connected to the transistor to output the quantized analog signal to the coding device in response to the analog signal.
7 more elements
Dependencies are inferred from the claim text.