US 6,320,525 B1Granted

Analog-to-digital level error automatic calibration circuit

AssigneeWinbond Electronics Corp.

InventorTe-Hsun Huang

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Abstract

Provided is an analog-to-digital level error automatic calibration circuit according to the invention. The analog-to-digital level error automatic calibration circuit includes a calibration switch circuit, an input buffer circuit, an error differential amplifying circuit, an N-bit analog-to-digital converter, a calibration register and a subtractor. The differential amplifying circuit receives and amplifies an external sense voltage or a calibration voltage so as to generate a first error amplifying voltage or a second error amplifying voltage. The first and second error amplifying voltages are converted to a first digital value and a second digital value, respectively. Thereafter, the second digital value is subtracted from the first digital value by the subtractor to generate a converted value without taking an offset voltage of an operational amplifier into calculation.

Claims13

Dependent claims

An analog-to-digital level error automatic calibration circuit comprising:

a calibration switch circuit for receiving a reference voltage and an external sense voltage and transmitting a reference output voltage and a calibration voltage by dividing the reference voltage;
an input buffer circuit for receiving one of the reference output voltage, the calibration voltage and the external sense voltage output from the calibration switch circuit;
an error differential amplifying circuit for receiving and amplifying the output voltage of the input buffer circuit, and transmitting a first error amplifying voltage when the output voltage is the external sense voltage or a second error amplifying voltage when the output voltage is the calibration voltage;
an N-bit analog-to-digital converter electrically coupled to the output terminal of the error differential amplifying circuit for converting the first error amplifying voltage and the second error amplifying voltage into a first digital value and a second digital value;
a calibration register electrically coupled to the N-bit analog-to-digital converter for storing the second digital value;
and
a subtractor for receiving the first digital value and the second digital value, and transmitting a result value obtained by subtracting the second digital value from the first digital value.

4 more elements

Dependencies are inferred from the claim text.