Circuitry and a method for introducing a delay
AssigneeSTMicroelectronics S.r.l.
InventorWilliam Barnes
Life of this patent
Estimating the term…
Abstract
Circuitry for introducing a delay to a signal comprising input means for receiving the signal to be delayed; a first delay path; a second delay path; selection means for causing the signal passing through a selected one of the delay paths to be output from said circuitry; comparing means for comparing the phase difference between the signal output by said circuitry and the input to said selected delay path to provide a first comparison signal and for comparing the phase delay of said first delay path with that of said second delay path to provide a second comparison signal, wherein said first and second comparison signals are used by the selection means to determine which of said delay paths selected.
Claims21
Circuitry for introducing a delay to a signal, comprising:
- input means for receiving the signal to be delayed;
- a first delay path;
- a second delay path;
- selection means for causing the signal passing through a selected one of said first and second delay paths to be output from said circuitry;
- control means for controlling said selection means;
- and
- comparing means for comparing a phase difference between the signal output by said circuitry and an input to said selected delay path to provide a first comparison signal and for comparing a phase delay of said first delay path with that of said second delay path to provide a second comparison signal, wherein said first and second comparison signals are used by the control means to determine whether to change said selected delay path.
A method of introducing a delay to a signal comprising steps of:
- receiving a signal to be delayed;
- passing said input signal through a plurality of delay paths;
- selecting an output signal from a first delay path of said plurality of delay paths and outputting a delayed output signal corresponding to said selected output signal;
- comparing a phase difference between the delayed output signal and said input signal passed to said selected delay path to provide a first comparison signal;
- and
- comparing a phase delay of said selected delay path with a phase delay of a second delay path of said plurality of delay paths to provide a second comparison signal;
- wherein said step of selecting includes a step of using said first and second comparison signals to determine whether to change said selected delay path.
A delay circuit for delaying an input signal, comprising:
- a first delay path to receive the input signal and provide a first delayed output signal;
- a second delay path to receive the input signal and provide a second delayed output signal;
- a first comparator to receive the input signal and a selected delayed output signal, compare a phase of the input signal with a phase of the selected delayed output signal, and provide a first comparison signal;
- a second comparator to receive the first delayed output signal and the second delayed output signal, compare the phase of the first delayed output signal with a phase of the second delayed output signal, and provide a second comparison signal;
- a multiplexer to receive the first and second delayed output signals and select one of the first and second delayed output signals as the selected delayed output signal;
- and
- a control circuit to receive the first and second comparison signals and determine which of the first and second delayed output signals is selected by the multiplexer as the selected delayed output signal.
Dependencies are inferred from the claim text.