Method and circuit of soft start and of power monitor for IC with multiple supplies
AssigneeSTMicroelectronics S.r.l.
InventorsLuigi Eugenio Garbelli, Giuseppe Luciano, Salvatore Portaluri
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTMicroelectronics S.r.l.
InventorsLuigi Eugenio Garbelli, Giuseppe Luciano, Salvatore Portaluri
Estimating the term…
The monitoring of multiple supply voltages of an integrated circuit is done using a single external capacitor connected to a pin of the integrated circuit. Part of the multiple supply voltages are externally generated and part are internally generated. The internally generated supply voltages may include different voltages with different signs. A logic signal indicating that all the supply voltages have reached pre-established values before enabling functioning of the integrated circuit is generated after an initial soft start phase of the turn-on process.
A method for monitoring multiple supply voltages in an integrated circuit, the multiple supply voltages being externally and internally generated, the method comprising:
A method for monitoring multiple supply voltages in an integrated circuit, the method comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.
No related US applications are recorded in the indexed filing history.
Drawings are temporarily unavailable. Open the PDF at USPTO
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by…
Wherein the variable actually regulated by the final control device is DC: characterised by reference voltage circuitry, e.g. soft start, remote…
Measuring electric variables
Systems for regulating electric or magnetic variables
Term ended 7 Sep 2020 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates to integrated digital circuits, and, more particularly, to a procedure for monitoring all the power supplies within an integrated circuit (IC). This monitoring is a function referred to as power monitoring.
Integrated systems tend to have several subsystems and power sections integrated on a single chip. These devices commonly use different positive power supplies, and often use negative power supplies to power in the most efficient manner the different chip sections or the various subsystems integrated on the same chip.
Sometimes one or more supply voltage sources are externally provided, while others are implemented internally by as many voltage regulators as there are externally generated supply voltages. In these monolithic integrated complex systems, it is very important to monitor the level of all the different supply voltages and to generate a so-called NPOR signal stating their compliance or noncompliance with their respective design values.
FIG. 1 is a sequence of diagrams depicting the turn-on procedure for a positive verification of the internally generated supply voltages according to the present invention;
FIG. 2 is a sequence of diagrams depicting the turn-on procedure for a negative verification of the internally generated supply voltages according to the present invention; and
FIG. 3 is a basic block diagram for implementing the method according to the present invention.
The system of the present invention has been successfully tested in an integrated circuit (IC) having a plurality of regulators therein. In a sample device, a first supply voltage 12V and a second supply voltage 5V are applied to respective pins from external sources. A third supply voltage 3.3V is generated internally and powers a regulator generating a fourth regulated supply voltage 2.5V and a regulator generating a fifth negative supply voltage −5V.
The basic diagram of a circuit according to the present invention is depicted in FIG. 3. FIGS. 1 and 2 illustrate a sequence of diagrams (corresponding to an algorithm) depicting the turn-on procedures for two different situations that may occur at the turn-on of the IC.
Referring to the diagram of FIG. 3, both the soft start function and the power monitor function are implemented according to the present invention via a single external capacitor C. The use of a single external capacitor requires only one pin of the IC. The capacitor C is charged by the current generator I towards a certain voltage, which is indicated as Vreg. At turn-on, the transistor M1 is biased in a conduction state so that the external capacitor C maintains in a discharged state.