Current source circuit
AssigneeKabushiki Kaisha Toyoda Jidoshokki Seisakusho
InventorsTetsuo Tateishi, Katsutomi Harada
Life of this patent
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Abstract
A start signal is supplied to MOS transistor Q8, MOS transistor Q8 is turned on, the first current mirror circuit is driven, and the same mirror current flows in MOS transistors Q4-Q7. Then, of two MOS transistors Q8 and Q9 that compose the second current mirror circuit, to MOS transistor Q8 is connected a resistor R2 and to MOS transistor Q9 is supplied a reference signal (Vref). According to such a configuration, reference current (Iref) that is generated in resistor R2 becomes current corresponding to the reference signal (Vref), and thereby output current (Iout) is outputted from MOS transistor Q7 based on this reference current (Iref).
Claims5
A current source circuit for minimizing the time lag between a reference signal and an output current, the current source circuit comprising:
- a first current mirror circuit for outputting the output current;
- a second current mirror circuit connected to the first current mirror circuit, and the second current mirror circuit connected to a resistor for generating a reference current corresponding to the output current;
- a reference signal supply circuit for supplying the reference signal to the second current mirror circuit, wherein the reference signal supplies current for generating the reference current;
- and
- an input terminal connected to at least one of the first current mirror circuit and the second current mirror circuit and the input terminal receives a start signal that drives one of the first current mirror circuit and the second current mirror circuit.
Dependencies are inferred from the claim text.