Buffer device with dual supply voltage for low supply voltage applications

An electronic device, comprising:

• a first, a second and a third reference voltage wherein said first reference voltage has a lower value than said second reference voltage and said third reference voltage has a lower value than said first reference voltage;
• a first and a second MOS transistor, wherein said transistors are complimentary, are arranged between said first voltage reference and said third voltage reference;
• have gate terminals tied together and to an input terminal of said electronic device;
• and have drain terminals tied together and to an output terminal of said electronic device;
• a third MOS transistor, having a source connected to said second voltage reference and a drain connected to said output terminal of said electronic device;
• a sensing device having a first sensing terminal connected to said input terminal of said electronic device, a second sensing terminal connected to said output terminal of said electronic device, and a control terminal connected to a gate terminal of said third MOS transistor.

An electronic buffer device, comprising:

• a first MOS transistor connected between a first voltage reference and an output terminal and having a gate;
• a second MOS transistor connected between the output terminal and a second voltage reference, the second MOS transistor having a gate connected to the gate of the first MOS transistor and to an input terminal and being complementary to the first transistor;
• and
• means for providing a conductive path between the output terminal and a third voltage reference in response to sensing a transition at the input terminal from a first logic state to a second logic state.