Process for manufacturing a semiconductor device
AssigneeNEC Corporation
InventorTatsuya Usami
Life of this patent
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Abstract
An HSQ film 4 is formed on a silicon oxide film 1 and the film 4 is subject to B2H6 plasma irradiation, to form a boron-implanted region 5. After forming a plasma TEOS film 6 on the region, a concave 8 is formed with a hydrofluoric acid-containing etchant, while wet-etching is stopped on the boron-implanted region 5. Then, the exposed HSQ film 4 in the bottom of the concave 8 is dry-etched to form a contact hole 9 reaching an Al interconnection 2. Then, the contact hole 9 is filled with an upper interconnection material to provide a multilayered interconnection structure.
Claims24
A process for manufacturing a semiconductor device, comprising the steps of forming the first and the second films on a semiconductor substrate and then wet-etching the second film with an etchant wherein the first film has a higher etching rate to the etchant than that of the second film;
- after forming the first film, boron being ion implanted in a surface layer in a level of 5×1021 to 1×1023 atoms/cm3 to improve said first film's wet etching resistance without changing the film's internal structure, before forming the second film.
A process for manufacturing a semiconductor device, comprising the steps of:
- forming a lower interconnection on a semiconductor substrate;
- forming an interlayer insulating film in which the first and second films are sequentially deposited, on the surface;
- wet-etching a given area of the second film with an etchant to expose the first film;
- dry etching the exposed first film to form a contact hole reaching the lower interconnection;
- and
- forming an upper interconnection layer which fills the contact hole;
- wherein the first film has a higher etching rate to the wet etchant than that of the second film,
- after forming the first film, boron being ion implanted in a surface layer in a level of 5×1021 to 1×1023 atoms/cm3 to improve said first film's wet etching resistance without changing the film's internal structure, before forming the second film.
A process for manufacturing a semiconductor device comprising the steps of:
- forming a lower interconnection on a semiconductor substrate;
- forming an interlayer insulating film in which the first and the second films are sequentially deposited, on the surface;
- wet-etching a given area of the second film with an etchant to form a sectional cup-shaped concave in the bottom of which the first film is exposed;
- dry-etching, the exposed first film to form a contact hole reaching the lower interconnection;
- forming an upper interconnection layer which fills the contact hole;
- and making the upper interconnection reflow by heating, wherein the first film has a higher etching rate to the wet etchant than that of the second film, after forming the first film, boron being ion implanted in a surface layer in a level of 5×1021 to 1×1023 atoms/cm3 to improve said first film's wet etching resistance without changing the film's internal structure, before forming the second film.
Dependencies are inferred from the claim text.