Nitridation process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device
AssigneeAdvanced Micro Devices, Inc.
InventorsArvind Halliyal, Robert B. Ogle, Susan G. Kim, Kenneth Au
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AssigneeAdvanced Micro Devices, Inc.
InventorsArvind Halliyal, Robert B. Ogle, Susan G. Kim, Kenneth Au
Estimating the term…
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device includes the formation of a nitrogenated top oxide layer. The process includes the sequential formation of a silicon nitride layer and a top oxide layer using an in-situ LPCVD or RTCVD deposition process in which the silicon nitride layer is not exposed to ambient atmosphere prior to the formation of the top oxide layer. After forming the top oxide layer, an annealing process is carried out to diffuse nitrogen into the top oxide layer. The formation of a nitrogenated top oxide layer provides an improved two-bit EEPROM memory device by reducing charge leakage in the ONO floating-gate electrode.
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of:
A process for fabricating a stacked-gate structure including an ONO floating-gate electrode in a two-bit EEPROM device comprising:
A process for fabricating an ONO floating-gate electrode in a two-bit device comprising the steps of:
Dependencies are inferred from the claim text.