Method for fabricating a bottom electrode of a dynamic random access memory capacitor

Abstract

The present invention provides a method for fabricating a bottom electrode of a dynamic random access memory (DRAM) capacitor. First, a first sacrificial layer, an intermediate layer and a second sacrificial layer are sequentially formed on a substrate. Then, an aperture is formed on the first sacrificial layer, the intermediate layer and the second sacrificial layer. An annular groove is then formed in the inner circumferential surface of the aperture by removing a fixed depth of the intermediate layer. After that, the aperture and the annular groove are filled with a first amorphous silicon layer, a second amorphous silicon layer and a third amorphous silicon layer. The second amorphous silicon layer has a lower impurity concentration than those of the first amorphous silicon layer and the third amorphous silicon layer. The first amorphous silicon layer and the second amorphous silicon layer both fill into the annular groove and form an annular ring. Next, the first sacrificial layer and the second sacrificial layer are removed to reveal the first amorphous silicon layer. Next, a predetermined depth of the first amorphous silicon layer is removed to reveal the second amorphous silicon layer. Then, the intermediate layer is removed to reveal the first amorphous silicon layer at the annular ring. Finally, a plurality of hemispherical grains are formed on the first amorphous silicon layer and the second amorphous silicon layer.

Dependencies are inferred from the claim text.