Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modules
AssigneeIntel Corporation
InventorsJohn B. Halbert, Jim M. Dodd, Chung Lam, Randy M. Bonella
Life of this patent
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AssigneeIntel Corporation
InventorsJohn B. Halbert, Jim M. Dodd, Chung Lam, Randy M. Bonella
Estimating the term…
A plurality of memory modules interface through a daisy-chain providing a point-to-point connection for each memory module. The first and the last memory module in the daisy chain each connect to a separate memory controller port forming a ring circuit. A distinct set of signals connect the memory modules in each direction. A junction circuit in each memory module provides line isolation, a coupling to the adjoining memory modules in the daisy chain, or in the case of the first and last memory module in the daisy chain, a memory module and a memory controller, and a data synchronization circuit. Each junction circuit provides as well as voltage conversion so that the memory devices on a memory module operate at a different voltage than the memory controller, and multiplexing/de-multiplexing so that a lesser number of lines interface with each junction circuit.
A first memory module comprising:
A memory system comprising:
Dependencies are inferred from the claim text.