Processor having a trace access instruction to access on-chip trace memory
AssigneeAdvanced Micro Devices, Inc.
InventorDaniel Mann
Life of this patent
Estimating the term…
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AssigneeAdvanced Micro Devices, Inc.
InventorDaniel Mann
Estimating the term…
A computer system includes a memory for storing instructions executable by a processor and an on-chip trace memory having a plurality of locations for storing trace information that indicates execution flow in the processor. A trace access instruction provides for access to the on-chip trace memory on the processor. The trace access instruction can be a write instruction or a read instruction. Typically, both read and write to the trace memory is provided. The system also has the capability to trace on start or restart of an executable thread by providing to the processor an indication of which executable thread to trace via a debug port. That indicates to the processor to provide trace information when the executable thread starts. When execution of the executable thread starts, the processor places an identifier corresponding to the executable thread into the trace memory to indicate that subsequent entries placed into the trace memory are part of said executable thread. The processor may also provide an entry indicating when the thread stops executing.
A method of operating a computer system including a processor, comprising:
A computer program embodied on computer readable media, for execution on a computer system including a processor, said processor including an on-chip trace memory, and a memory for storing instructions executable by said processor, the computer program comprising:
A method of operating a computer system including a processor and a memory storing instructions for said processor, the method comprising:
An operating system including a trace handling component, said operating system for execution on a computer system including a processor and memory for storing instructions executable by said processor, the trace handling component comprising:
Dependencies are inferred from the claim text.