Back to results
US 6,314,017 B1Granted
Semiconductor memory device
AssigneeSony Corporation
InventorsTakashi Emori, Toshio Kobayashi, Naoshi Ikeda
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device comprising a write transistor with a gate connected to a write word line and with a first impurity region forming a source or drain connected to a bit line, a read transistor with a gate connected to a second impurity region forming a source or drain of the write transistor, a first impurity region connected to a read word line, and a second impurity region connected to a bit line, and a capacitor connected between the gate and the second impurity region of the read transistor.
Claims20
A semiconductor memory device having a memory cell, comprising:
- a write transistor with a gate connected to a write word line and with a first impurity region forming a source or drain connected to a bit line;
- a read transistor with a gate connected to a second impurity region forming a source or drain of the write transistor, a first impurity region connected to a read word line, and a second impurity region connected to a bit line;
- and
- a capacitor connected between the gate and the first impurity region of the read transistor.
1 more element
Dependencies are inferred from the claim text.