System for efficient utilization of multiple test systems
OwnerKenneth E. Posse, Stig Oresjo +2inventors
InventorsKenneth E. Posse, Stig Oresjo, Patricia Monterio, Anne Dudfield
Life of this patent
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OwnerKenneth E. Posse, Stig Oresjo +2inventors
InventorsKenneth E. Posse, Stig Oresjo, Patricia Monterio, Anne Dudfield
Estimating the term…
A system for efficient utilization of multiple test systems may include an apparatus for testing an electronic circuit board, which comprises a number of computer readable media containing computer readable program code comprising code for a test analysis system that interfaces with at least two test systems. The test analysis system reads a description of said board's board topology and analyzes a number of potential defects of said board based on that description. The test analysis system creates at least two test procedures for the at least two test systems by creating a first test procedure to test the electronic circuit board on a first test system of the at least two test systems. The system then creates at least one other test procedure to test the electronic circuit board on at least one other test system of the at least two test systems. The system then optimizes the at least one other test procedure based on at least one other of the at least two test procedures created for the at least two test systems to reduce redundancies in the at least two test procedures.
A method for developing a test procedure to test an electrical circuit board on multiple test systems, comprising:
A method for testing an electrical circuit board, comprising:
An apparatus for developing a test for an electronic circuit board, comprising:
Dependencies are inferred from the claim text.