Method and system for optimized data transfers in a mixed 64-bit/32-bit PCI environment

In a computer system having a plurality of 32-bit PCI (peripheral component interconnect) devices and 64-bit PCI devices coupled to a 64-bit PCI bus in a mixed 64-bit/32-bit PCI environment, a method for optimizing the performance of a 64-bit PCI initiator when transferring a 64-bit data via the 64-bit PCI bus, the method comprising the 64-bit PCI initiator performing the steps of:

• a) receiving a single 64-bit data in a 64-bit PCI initiator for transfer via a 64-bit PCI bus;
• b) breaking the 64-bit data into a first 32-bit data and a second 32-bit data;
• c) initiating a data transaction with a target device by arbitrating for ownership of the 64-bit PCI bus;
• d) tristating AD[63:32] of the 64-bit PCI bus;
• e) transferring the first 32-bit data to a target device via the 64-bit PCI bus;
• f) transferring the second 32-bit data to a target device via the 64-bit PCI bus;
• and
• g) completing the data transaction with the target device without asserting a REQ64# signal such that a REQ64# ACK64# protocol is avoided, enabling a more efficient completion of the data transaction.

In a computer system having a plurality of 32-bit PCI (peripheral component interconnect) devices and 64-bit PCI devices coupled to a 64-bit PCI bus in a mixed 64-bit/32-bit PCI environment, a data transfer optimized 64-bit PCI initiator comprising:

• a 64 bit PCI initiator coupled to the 64 bit PCI bus, the 64 bit PCI initiator including a controller state machine adapted to cause the 64 bit PCI initiator to implement an optimized data transfer method for transferring a single 64 bit data, the method comprising the steps of:
• a) receiving the single 64-bit data in the 64-bit PCI initiator for transfer via the 64-bit PCI bus;
• b) breaking the 64-bit data into a first 32-bit data and a second 32-bit data;
• c) initiating a data transaction with a target device by arbitrating for ownership of the 64-bit PCI bus;
• d) tristating AD[63:32] of the 64-bit PCI bus;
• e) transferring the first 32-bit data to a target device via the 64-bit PCI bus;
• f) transferring the second 32-bit data to a target device via the 64-bit PCI bus;
• and
• g) completing the data transaction with the target device without asserting a REQ64# signal such that a REQ64# ACK64# protocol is avoided, enabling a more efficient completion of the data transaction.