IC with dual function clock and device ID circuit
AssigneeExar Corporation
InventorsGlenn A. Wegner, Art Khachaturian
Life of this patent
Estimating the term…
Abstract
An integrated circuit in which the address and data inputs for a clock register to program a clock is also used for device ID and revision number. A shadow register is provided which is accessible to output the ID and revision number when (1) the regular clock register is addressed, and (2) a particular data input for activating the shadow register appears on the data input to the clock register.
Claims22
An integrated circuit comprising:
- a clock circuit;
- a clock register for providing a programmable value to said clock circuit for use in determining a clock frequency;
- a data input coupled to said clock register;
- a shadow register for storing a device identification, said shadow register sharing an address with said clock register;
- a data output coupled to said clock register and to said shadow register;
- and
- a detect circuit coupled to said data input for detecting a predetermined data input value on said data input and enabling an output from said shadow register in response.
A UART integrated circuit comprising:
- a clock circuit;
- a clock register for providing a programmable divide by value to said clock circuit for use in determining a clock frequency;
- a shadow register for storing a device identification, said shadow register sharing an address with said clock register;
- a data I/O bus coupled to said clock register and said shadow register;
- an address input;
- a control circuit for enabling said clock register in response to a clock register address on said address input;
- and
- a detect circuit coupled to said data I/O bus and said address input for detecting an illegal data state of zero and said clock register address, and enabling an output from said shadow register and disabling said clock register in response.
A method for providing a device identification for an integrated circuit having a clock circuit, a clock register for providing a programmable value to said clock circuit for use in determining a clock frequency, and a data input coupled to said clock register, said method comprising the steps of:
- storing a device identification in a shadow register, said shadow register sharing an address with said clock register;
- and
- detecting a predetermined data input value on said data input and enabling an output from said shadow register in response.
A UART integrated circuit comprising:
- a clock circuit;
- a clock register for providing a programmable value to said clock circuit for use in determining a clock frequency;
- a shadow register for storing a device identification, said shadow register sharing an address with said clock register;
- a multiplexing circuit having an output coupled to said clock circuit, a first input coupled to an output of said clock register, and a second input coupled to an output of said shadow register;
- a reset input;
- and
- a control circuit coupled to said reset input and a select input of said multiplexing circuit, said control circuit detecting a reset signal on said reset input and providing a select signal to said multiplexing circuit to select an output from said shadow register in response.
A method for providing a device identification for a UART integrated circuit having a clock circuit and a clock register for providing a programmable value to said clock circuit for use in determining a clock frequency, said method comprising the steps of:
- storing a device identification in a shadow register, said shadow register sharing an address with said clock register;
- and
- detecting a reset signal and enabling an output from said shadow register to said clock circuit in response.
Dependencies are inferred from the claim text.