Method of detecting signal degradation fault conditions within SONET and SDH signals
AssigneeAlcatel Canada Inc.
InventorsDan Burke, Alan Jennings
Life of this patent
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Abstract
In a method of detecting signal degradation conditions in synchronous digital signals, the error monitors first detect the presence and/or absence of a particular bit error ratio by integrating received parity errors over time. Subsequently a monitor client reacts to notifications from bit error rate monitors that the state of the presence/absence of specific bit error ratios has changed to generate an alarm condition when appropriate.
Claims13
A method of detecting signal degradation conditions in synchronous digital signals, comprising the steps of:
- polling said synchronous digital signals to obtain a first set of sample parity error counts at predetermined intervals;
- integrating a set of sample parity error counts in a first bit error rate monitor over a predetermined number of samples to determine a first bit error rate;
- generating an output from said first bit error rate monitor when a first bit error rate condition is present;
- creating a subset of sample parity error counts from said first set of sample parity error counts by selecting samples from said first set at specific intervals;
- integrating said subset of sample parity counts over a predetermined number of samples of said subset in a second bit error rate monitor to determine a second bit error rate;
- generating an output from said second bit error rate monitor when a second bit error rate condition is present;
- and
- reacting to said outputs from said bit error rate monitors that said first or second bit error rate conditions are present to take a predetermined action that depends on the state of both the bit error rate monitors.
An apparatus for detecting signal degradation conditions in synchronous digital signals, comprising:
- a first bit error rate monitor for receiving a set of sample parity error counts from said synchronous digital signals at predetermined intervals, integrating said set of sample parity counts over a predetermined number of samples to determine a first bit error rate, and generating an output when a first bit error rate condition is present;
- a second bit error rate monitor for receiving a subset of sample parity counts from said set of sample parity error counts selected from said set at specific intervals, integrating said subset of sample parity counts over a predetermined number of samples of said subset to determine a second bit error rate, and generating an output when a second bit error rate condition is present;
- and
- a bit error rate monitor client responsive to outputs from said first and second bit error rate monitors to take a predetermined action that depends on the state of said both said bit error rate monitors.
Dependencies are inferred from the claim text.