High-speed sense amplifier
OwnerRaj Kumar Jaininventor
Life of this patent
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Abstract
The invention pertains to a high-speed sense amplifier and to a method to operate the sense amplifier. The sense amplifier to which a power supply voltage can be applied via a semiconductor switch can be used to amplify a binary data signal read from a memory cell and it is arranged between two mutually complementary bit lines. The load output of the semiconductor switch can be precharged with a reference voltage source, wherein the amount of the reference voltage is less than or equal to the difference of the power supply voltage and the threshold voltage of the semiconductor switch. Due to this design, the read cycles can be clearly reduced. In addition, a greater read sensitivity is possible.
Claims11
Sense amplifier (PSA, NSA) to amplify a binary data signal read from a memory cell (MCL, MCR) of a semiconductor memory, (a) which is arranged between two mutually complementary bit lines (BITL, BITR) that are each connected to a memory column of the semiconductor memory;
- (b) with a semiconductor switch (P3, N3) whose load output (P, N) is connected to the sense amplifier (PSA, NSA) and through which a power supply voltage (VDD, VSS) can be switched onto the sense amplifier (PSA, NSA);
- (c) with a reference voltage source (VDD, N4;
- VSS, P4) for a reference voltage (VREF1, VREF2) which can be switched onto the load output (P, N) of the semiconductor switch (P3, N3), wherein the amount of the reference voltage (VREF1, VREF2) is less than or equal to the difference of the power supply voltage (VDD, VSS) and the threshold voltage of the semiconductor switch (P3, N4).
Dependencies are inferred from the claim text.