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AssigneeCirrus Logic, Inc.
InventorsVlad Bril, Alexander Julian Eglit, Robin Sungsoo Han, Muralidhar Reddy Jammula
Estimating the term…
A flat panel display controller is provided with a circuit for monitoring clocking signal(s) to the flat panel display. A clocking signal output to the flat panel display may be fed back to the display controller using a conventional I/O pad. In the preferred embodiment, the fed back clocking signal resets a counter. In a second embodiment, the fed back clocking signal may then pass through an edge detector whose output then resets the counter. The counter will overflow if a edge signal is not received within a predetermined time period. If an overflow occurs, the carry signal of the counter will initiate a flat panel power shutdown through power control circuitry. The clock signal for the counter may be derived from an off-chip oscillator such that if a failure occurs within the display controller, the counter will continue to function.
A display controller for controlling a flat panel display, comprising:
A computer comprising:
The method of controlling a flat panel display so as to prevent damage to the flat panel display in the event a clock signal is interrupted, the method comprising the steps of:
A display controller for controlling a flat panel display, comprising:
Dependencies are inferred from the claim text.