Driving method and circuit for pixel multiplexing circuits

A circuit for addressing pixels in a pixel array comprising:

• at least two transistors associated with each pixel, the transistors disposed in the array of pixels;
• a plurality of control lines for each pixel which control the transistors of each pixel;
• and
• at least one gate driver which sequences waveforms on the control lines to provide multiplexing of the pixels at the pixels within the array, wherein the control lines include row lines connected to gates of one of the at least two transistors and enable lines connected to gates of another transistor of the at least two transistors, the row lines and enable lines being alternately disposed within the array of pixels and shared between adjacent rows of pixels.

A driving method for multiplexing pixels in active matrix displays comprising steps of:

• providing a plurality of pixels arranged in an array, wherein each pixel includes at least two transistors associated therewith, the transistors disposed in the array of pixels and each pixel including a plurality of control lines for controlling the transistors for turning each pixel on and off;
• sequencing waveforms on the control lines to provide multiplexing of the pixels at the pixels within the array, wherein the control lines include row lines;
• providing storage capacitors having a charging electrode and a counter electrode, the charging electrode coupled to one of the at least two transistors for each pixel and the counter electrode including a first row line;
• and
• compensating for feedthrough voltage on the storage capacitor by providing a negative pulse on the first row line while charging the charging electrode with a positive pulse on a second row line.

A driving method for multiplexing pixels in active matrix displays comprising steps of:

• providing a plurality of pixels arranged in an array, wherein each pixel includes at least two transistors associated therewith, the transistors disposed in the array of pixels and each pixel including a plurality of control lines for controlling the transistors for turning each pixel on and off;
• sequencing waveforms on the control lines to provide multiplexing of the pixels at the pixels within the array, wherein the control lines include row lines;
• providing storage capacitors having a charging electrode and a counter electrode, the charging electrode coupled to one of the at least two transistors for each pixel and the counter electrode including a first row line;
• and
• compensating for an effective value of a data line voltage by providing a negative pulse on the first row line while charging the charging electrode with a positive pulse on a second row line.

A driving method for multiplexing pixels in active matrix displays comprising steps of:

• providing a plurality of pixels arranged in an array, wherein each pixel includes at least two transistors associated therewith, the transistors disposed in the array of pixels and each pixel including a plurality of control lines for controlling the transistors for turning each pixel on and off;
• and
• sequencing waveforms on the control lines to provide multiplexing of the pixels at the pixels within the array, wherein the control lines include row lines;
• providing storage capacitors having a charging electrode and a counter electrode, the charging electrode coupled to one of the at least two transistors for each pixel and the counter electrode including a first row line;
• and
• compensating for feedthrough voltage on the storage capacitor by providing a positive pulse on the first row line while charging the charging electrode with a negative pulse on a second row line.

A driving method for multiplexing pixels in active matrix displays comprising steps of:

• providing a plurality of pixels arranged in an array, wherein each pixel includes at least two transistors associated therewith, the transistors disposed in the array of pixels and each pixel including a plurality of control lines for controlling the transistors for turning each pixel on and off;
• sequencing waveforms on the control lines to provide multiplexing of the pixels at the pixels within the array, wherein the control lines include row lines;
• providing storage capacitors having a charging electrode and a counter electrode, the charging electrode coupled to one of the at least two transistors for each pixel and the counter electrode including a first row line;
• and
• compensating for an effective value of a data line voltage by providing a positive pulse on the first row line while charging the charging electrode with a negative pulse on a second row line.