Race removal or reduction in latches and loops using phase skew

A method for controlling a flow of a signal in a loop circuit, said loop circuit including a signal line, an input node connected to the signal line, an output node, a forward path connected between the input node and output node, and a feedback path also connected between the input node and output node, said method comprising:

• (a) generating a first control signal for controlling flow of a first data signal, as supplied from said signal line, from the input node to the output node along said forward path;
• (b) inputting said first control signal to at least one circuit element along said forward path to cause said first data signal supplied from said signal line to pass from the input node to the output node;
• (c) generating a second control signal for controlling flow of a second data signal along said feedback path, said generating step including skewing a phase of the second control signal relative to the first control signal so that said second data signal arrives at the input node before the first data signal supplied from said signal line;
• and
• (d) inputting said second control signal directly to at least one circuit element along said feedback path, wherein said at least one circuit element is a phased inverter.

A loop circuit, comprising:

• an input node;
• an output node;
• a forward path connected between the input node and output node;
• a feedback path connected between the input node and output node;
• a signal line connected to the input node;
• a first controller which generates a first control signal that controls flow of a first data signal, as supplied from said signal line, from the input node to the output node along said forward path, said first controller inputting said first control signal to at least one circuit element along said forward path to cause said first data signal supplied from said signal line to pass from the input node to the output node;
• and
• a second controller which generates a second control signal that controls flow of a second data signal along said feedback path, said second controller generating said second control signal by skewing a phase of the second control signal relative to the first control signal so that said second data signal arrives at the input node after the first data signal supplied from said signal line;
• said second controller directly inputting said second control signal to at least one circuit element along said feedback path, wherein said at least one circuit element along said feedback path is a phased inverter.

A double-edge-triggered flip flop, comprising:

• an input terminal;
• an output terminal;
• an upper path connected between the input terminal and output terminal, said upper path including a first phased inverter and a first latch connected to the first phased inverter, said first latch including a forward path and a feedback path;
• a lower path connected between the input terminal and output terminal, said lower path including a second phased inverter and a second latch connected to the second phased inverter, said second latch including a forward path and a feedback path;
• an inverter connected to said output terminal;
• a first controller which generates control signals that control flow of data along the forward paths of said first latch and said second latch;
• and
• a second controller which generates control signals that control flow of data along the feedback paths of said first latch and said second latch, said control signals generated by said second controller having a skewed phase relative to said control signals generated by said first controller,
• wherein said skewed phase causes data from the feedback path of said first latch to arrive at the forward path of said first latch after a data input from said first phased inverter, and
• wherein said skewed phase causes data from the feedback path of said second latch to arrive at the forward path of said second latch after a data input from said second phased inverter.

A loop circuit, comprising:

• an input node;
• an output node;
• a forward path connected between the input node and output node;
• a feedback path connected between the input node and output node;
• a signal line connected to the input node;
• a first controller which generates a first control signal that controls flow of a first data signal, as supplied from said signal line, from the input node to the output node along said forward path, said first controller inputting said first control signal to at least one circuit element along said forward path to cause said first data signal supplied from said signal line to pass from the input node to the output node;
• and
• a second controller which generates a second control signal that controls flow of a second data signal along said feedback path, said second controller generating said second control signal by skewing a phase of the second control signal relative to the first control signal so that said second data signal arrives at the input node after the first data signal supplied from said signal line;
• said second controller inputting said second control signal to at least one circuit element along said feedback path,
• wherein said second controller delays only one edge of said second control signal relative to one edge of said first control signal by an amount sufficient to ensure that said second data signal arrives at the input node after said first data signal.