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US 6,310,400 B1Granted
Apparatus for capacitively coupling electronic devices
AssigneeIntel Corporation
InventorsBrian Doyle, Quat T. Vu, David B. Fraser
Life of this patent
Estimating the term…
Abstract
A method and apparatus for capacitively coupling the input and output terminals of two semiconductor devices.
Claims24
An apparatus comprising:
- a first integrated circuit in a first chip, said first integrated circuit having an output terminal;
- and
- a second integrated circuit in a second chip, said first and second chips being separate electronic components wherein one of said separate electronic components comprises a microprocessor and the other of said electronic components comprises a cable memory device, said second integrated circuit having an input terminal, said input and output terminals being capacitively coupled.
An apparatus comprising:
- a first integrated circuit in a first chip, said first integrated circuit having an output driver;
- a second integrated circuit in a second chip, said first and second chips being separate electronic components wherein one of said separate electronic components comprises a microprocessor and the other of said electronic components comprises a cache memory device, said second integrated circuit having an input receiver;
- and
- a capacitor serially coupling said output driver and said input receiver.
1 more element
A semiconductor apparatus comprising:
- a first integrated circuit in a first chip, said first integrated circuit having an output pad comprising a first electrically conductive pad;
- a second integrated circuit in a second chip, said first and second chips being separate electronic components wherein one of said separate electronic components comprises a microprocessor and the other of said electronic components comprises a cache memory device, said second integrated circuit having an input pad comprising a second electrically conductive pad;
- and
- a dielectric material disposed between said first and second electrically conductive pads.
1 more element
An apparatus comprising:
- first integrated circuit in a first chip, said first integrated circuit having a first plurality of input and output terminals disposed on a first surface of said first chip, said terminals comprising a first set of electrically conductive pads;
- a second integrated circuit in a second chips, said first and second chips being separate electronic components wherein one of said separate electronic components comprises a microprocessor and the other of said electronic components comprises a cache memory device, said second integrated circuit having a second plurality of input and output terminals disposed on a second surface of said second chip, said terminals comprising a second set of electrically conductive pads, said second chip being attached to said first chip such that said first set of electrically conductive pads is substantially aligned with said second set of electrically conductive pads, said first and second set of electrically conductive pads being substantially parallel;
- and
- a dielectric material disposed between said first and second set of electrically conductive pads.
1 more element
An apparatus comprising:
- a microprocessor having a first circuit, said first circuit having a first terminal;
- and
- a cache memory device located on a separate electronic component than said microprocessor, said cache memory device having a second circuit, said second circuit having a second terminal, and said first and second terminals being capacitively coupled.
A semiconductor apparatus comprising:
- a microprocessor having a first circuit, said first circuit having a first terminal;
- a cache memory device located on a separate electronic component than said microprocessor, said cache memory device having a second circuit, said second circuit having a second terminal, said first and second terminals being capacitively coupled;
- and
- a dielectric material disposed between said first and second terminals.
1 more element
Dependencies are inferred from the claim text.