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AssigneeMicron Technology, Inc.
InventorsZhiqiang Wu, Li Li, Thomas A. Figura, Kunal R. Parekh, Pai-Hung Pan, Alan R. Reinberg, Kin F. Ma
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Methods are disclosed for forming shaped structures of silicon-containing material with ion implantation and an etching process which is selective to silicon-containing material implanted to a certain concentration of ions or with an etching process which is selective to relatively unimplanted silicon-containing material. In general, the methods initially involve providing a layer of silicon-containing material such as polysilicon or epitaxial silicon on a semiconductor substrate. The layer of silicon-containing material is then masked, and ions are implanted into exposed portions of the layer of silicon-containing material. The mask is removed, and the aforementioned selective etching process is conducted to result in one of an implanted and a relatively unimplanted portion of the layer of silicon-containing material being etched away and the other left standing to form a shaped structure of silicon-containing material. One preferred selective etching process uses an etchant solution comprising a selected weight percentage of tetramethyl ammonium hydroxide in deionized water. The etchant solution etches relatively unimplanted silicon-containing material implanted up to 60 times faster than it etches silicon-containing material implanted to beyond a threshold concentration of ions. The various methods are used to form raised shaped structures, shaped openings, polysilicon plugs, capacitor storage nodes, surround-gate transistors, free-standing walls, interconnect lines, trench capacitors, and trench isolation regions.
A method of selectively removing material from a semiconductor substrate comprising:
A method of forming an interconnect line on a semiconductor substrate, comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of removing material from a semiconductor substrate, comprising:
A method of selectively removing material from a semiconductor substrate, comprising:
A method of removing material from a semiconductor substrate, comprising:
A method of selectively removing material from a semiconductor substrate comprising:
A method of selectively removing material from a semiconductor substrate, comprising:
A method of forming an interconnect structure on a semiconductor substrate, comprising:
A method of forming a capacitor storage node on a semiconductor substrate, comprising:
A method of forming an interconnect structure on a semiconductor substrate in a CMOS process flow, comprising:
A method of forming a shaped structure on a semiconductor substrate, the method comprising:
A method of forming a MOS surround-gate transistor on a semiconductor substrate, comprising:
A method of forming a stacked capacitor storage node on a semiconductor substrate, the method comprising:
A method of forming a shaped structure on a semiconductor substrate, comprising:
A method of forming an interconnect structure on a semiconductor substrate, comprising:
A method of forming a storage node of a stacked capacitor on a semiconductor substrate, comprising:
An electrical device including a storage node of a stacked capacitor, comprising:
A method of forming a storage node of a stacked capacitor on a semiconductor substrate, comprising:
A method of forming a shaped structure on a semiconductor substrate, comprising:
A method of forming a structure in a semiconductor substrate, comprising:
A method of selectively forming a layer of a silicon-containing material on an exposed horizontal surface of a semiconductor substrate, comprising:
A method of forming an interconnect line on a semiconductor substrate, comprising:
Dependencies are inferred from the claim text.