Back to results
US 6,309,970 B1Granted
Method of forming multi-level copper interconnect with formation of copper oxide on exposed copper surface
AssigneeNEC Corporation
InventorsNobukazu Ito, Yoshihisa Matsubara
Life of this patent
Estimating the term…
Abstract
There is presented a semiconductor device including multiple levels of copper interconnects; wherein the surface of a copper interconnect corresponding to at least one underlying layer of another copper interconnect layer is turned into copper oxide to a thickness of 30 nm or more by oxidation conducted at the oxidation rate of 20 nm/minor less, and thereby the reflection of the exposure light from the lower-level copper interconnect is prevented, in forming by means of photolithography a trench to form a copper interconnect through damascening.
Claims18
A method of manufacturing a semiconductor, comprising:
- multiple levels of copper interconnects;
- wherein, in a process of forming a dielectric layer over a lower-level copper interconnect and then forming in said dielectric layer, a trench to form at least one of a copper interconnect through damascene metallization technique, and a via hole to form a contact with the lower-level copper interconnect, the surface of the lower-level copper interconnect is turned into copper oxide having a thickness of about 30 nm or more by an oxidation conducted at an oxidation rate of about 20 nm/min or less, and thereafter formation of the dielectric layer as well as formation of at least one of the trench and the via hole are carried out.
Dependencies are inferred from the claim text.