Semiconductor device and method of manufacturing the same
AssigneeNEC Corporation
InventorNorio Okada
Life of this patent
Estimating the term…
Abstract
In a semiconductor device, adjacent ones of aluminum wirings are electrically isolated from each other through an interlayer insulation film containing a void space portion which is disposed between the adjacent ones of the aluminum wirings in a condition in which the void space portion makes its lower surface substantially flush with a lower surface of each of the aluminum wirings. A trench is formed between the adjacent ones of the aluminum wirings in an upper surface of a semiconductor substrate. Each of the trench and the aluminum wirings has its side surfaces covered with a damage preventing silicon oxide film, i.e., side-wall insulation film which is used to form the trench. The trench is filled with the interlayer insulation film.
Claims15
A method of manufacturing a semiconductor device, comprising:
- a wiring formation step for forming a wiring pattern having a region in which a plurality of wirings are disposed side by side on a semiconductor substrate;
- a side-wall insulation film forming step for forming a side-wall insulation film on a side wall of each of said wirings;
- a trench formation step for forming a trench which has its bottom surface formed at a positon lower than a lower surface of each of said wirings, said trench being disposed between adjacent ones of said wirings;
- and
- a void-containing insulation film formation step for forming an insulation film containing a void space portion therein, wherein said insulation film is formed in said trench in a manner such that said void space portion makes its lower surface substantially flush with a lower surface of each of said wirings.
A method of manufacturing a semiconductor device, comprising:
- a resist-film formation step for forming a resist film which selectively covers a mask insulation film formed on a wiring metal film on a semiconductor substrate;
- a wiring formation step for forming a wiring pattern provided with a region in which a plurality of wirings are disposed side by side, said wiring pattern being formed through a plasma etching process of both said mask insulation film and said wiring metal film by using said resist film as a mask;
- a side-wall insulation film formation step for forming a side-wall insulation film on a side wall of each of said wirings;
- a trench formation step for forming a trench which has its bottom surface formed at a position lower than a lower surface of each of said wirings, said trench being disposed between adjacent ones of said wirings;
- and
- a void-containing insulation film formation step for forming an insulation film containing a void space portion therein, wherein said insulation film is formed in a manner such that said void space portion has its lower surface made substantially flush with said lower surface of each of said wirings.
A method of protecting semiconductor devices from electronic damage during a metal etching process, comprising:
- depositing a first insulator on a semiconductor substrate, and removing selected portions to form a patterned insulating layer;
- depositing a metal layer having a specified thickness on the patterned insulating layer;
- forming a patterning layer on the metal layer;
- plasma etching the metal layer for a time period specified to etch a thickness of the metal layer equal to the specified thickness plus a specified over etch;
- removing the patterning layer from the metal layer, resulting in a patterned metal layer of metal lines;
- depositing a specified thickness of a second insulator on the patterned metal layer;
- removing the portions of the second insulator on the top of the patterned metal layer and between individual ones of the patterned metal layer lines, resulting in a sidewall layer of the second insulator on each individual one of the patterned metal layer lines;
- etching the exposed portions of the first insulator layer for a specified time period to form trenches between each individual one of the patterned metal lines having a specified depth below the metal lines;
- and
- depositing a third insulator on the patterned metal layer.
Dependencies are inferred from the claim text.