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US 6,309,907 B1Granted

Method of fabricating transistor with silicon oxycarbide gate

AssigneeMicron Technology, Inc.

InventorsLeonard Forbes, Joseph E. Geusic, Kie Y. Ahn

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Abstract Drawings Claims Description

Abstract

A CMOS-compatible FET has a reduced electron affinity polycrystalline or microcrystalline silicon oxycarbide (SiOC) gate that is electrically isolated (floating) or interconnected. The SiOC material composition is selected to establish a desired barrier energy between the SiOC gate and a gate insulator. In a memory application, such as a flash EEPROM, the SiOC composition is selected to establish a lower barrier energy to reduce write and erase voltages and times or accommodate the particular data charge retention time needed for the particular application. In a light detector or imaging application, the SiOC composition is selected to provide sensitivity to the desired wavelength of light. Unlike conventional photodetectors, light is absorbed in the floating gate, thereby ejecting previously stored electrons therefrom. Also unlike conventional photodetectors, the light detector according to the present invention is actually more sensitive to lower energy photons as the semiconductor bandgap is increased.

Claims62

Dependent claims

Claim 1A method of fabricating a transistor on a semiconductor substrate · 76 words17 dependent Claim 19A method of fabricating a transistor · 50 words3 dependent Claim 23A method of fabricating a transistor · 80 words3 dependent Claim 27A method of fabricating a transistor · 80 words3 dependent Claim 31A method of fabricating a transistor · 78 words3 dependent Claim 35A method of fabricating a transistor · 67 words3 dependent Claim 39A method of fabricating a transistor · 97 words3 dependent Claim 43A method of fabricating a transistor · 97 words3 dependent Claim 47A method of fabricating a transistor · 95 words3 dependent Claim 51A method of fabricating a memory cell · 68 words3 dependent Claim 55A method of fabricating a memory cell · 99 words3 dependent Claim 59A method of fabricating a memory cell · 97 words3 dependent

A method of fabricating a transistor on a semiconductor substrate, the method comprising:

forming a source region and a drain region in a semiconductor substrate, a channel region being between the source region and the drain region in the semiconductor substrate;
forming an insulating layer on the channel region;
forming a gate on the insulating layer, wherein the gate comprises a silicon oxycarbide compound SiO(2-2w)Cw;
and
selecting w at a value approximately between 0 and 1.0.

2 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a gate on the substrate.

1 more element

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with a p-type dopant while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a gate on the substrate.

2 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with an n-type dopant while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a gate on the substrate.

2 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with boron while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a gate on the substrate.

2 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

3 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with an n-type dopant while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

4 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with a p-type dopant while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

4 more elements

A method of fabricating a transistor comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with boron while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

4 more elements

A method of fabricating a memory cell comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

3 more elements

A method of fabricating a memory cell comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with a p-type dopant while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

5 more elements

A method of fabricating a memory cell comprising:

forming an insulating layer on a substrate;
forming a layer of a silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer;
doping the silicon oxycarbide compound SiO(2-2w)Cw with boron while forming the layer of the silicon oxycarbide compound SiO(2-2w)Cw on the insulating layer or by a subsequent ion implantation;
and
removing portions of the insulating layer and the layer of the silicon oxycarbide compound SiO(2-2w)Cw to form a floating gate on the substrate;
forming an intergate dielectric on the floating gate;
and
forming a control gate over the intergate dielectric.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/138,294Filed 21 Aug 1998 · division
Priority: 29 Jul 1997
Granted: 30 Oct 2001
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 30/0411
Of FETs having insulated gates [IGFET]: of FETs having floating gates
H10D 30/6891
Floating-gate IGFETs: characterised by the shapes, relative sizes or dispositions of the floating gate electrode
H10D 64/01318
Characterised by the conductor: the conductor comprising a layer of alloy material, compound material or organic material contacting the…
H10D 64/035
Of data-storage electrodes: comprising conductor-insulator-conductor-insulator-semiconductor structures

Family

Application08/902,132Parent of this division · filed 29 Jul 1997
US 5,886,368 AParent of this division
US 6,309,907 B1This patent

From the US filing history. Foreign family members aren’t listed.

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