Sputtering apparatus for sputtering high melting point metal and method for manufacturing semiconductor device having high melting point metal

A method for manufacturing a semiconductor device including a transistor on a wafer, said method comprising:

• forming a gate insulating layer on a semiconductor substrate;
• forming a gate electrode of polysilicon on said gate insulating layer;
• sputtering a high melting point metal on said gate electrode so that an electrical load amount Q reaching said gate electrode is less than another electrical load amount that is determined by a gate withstand voltage of said gate insulating layer;
• and
• annealing said high melting point metal and said gate electrode for forming silicide on said gate electrode.

An apparatus for sputtering a high melting point metal on a polysilicon gate electrode of polysilicon formed on a gate insulating layer, said apparatus comprising:

• a cathode magnet;
• a target mounted on said cathode magnet;
• a wafer holder;
• a wafer mounted on said wafer holder;
• and
• a holder magnet generating a magnetic line of force, said magnetic line of force covering an edge of said wafer so that an electrical load amount Q reaching to said polysilicon gate electrode is less than another electrical load amount that is determined by a withstand voltage of said gate insulating layer.

A method of manufacturing a semiconductor device comprising:

• (a) selectively forming an isolation layer on a semiconductor substrate to define an active region;
• (b) forming a gate electrode over said active region, said gate electrode having a top surface and side wall surfaces;
• (c) introducing impurities into said active region by using said gate electrode and said isolation layer as a mask to form source and drain regions;
• (d) forming an insulating layer to cover said isolation layer, said gate electrode and said source and drain regions;
• (e) subjecting said insulating layer to an etching process to leave portions of said insulating layer on the side wall surfaces of said gate electrode as spacers, surfaces of said isolation layer and said source and drain regions and the top surface of said gate electrode being thereby exposed again;
• (f) depositing by a sputtering apparatus a high melting point metal layer over an entire surface of said semiconductor substrate including the surfaces of said isolation layer, said source and drain regions and said spacers and the top surface of said gate electrode, said sputtering apparatus including therein an electrically conductive collimator plate, said electrically conductive collimator plate being disposed between said semiconductor substrate and a target of said high melting point metal layer so that charging-up of said gate electrode is suppressed by said electrically conductive collimator plate;
• and
• (g) performing a heat treatment such that silicide layers are formed at interfaces between said high melting point metal layer and each of said gate electrode and said source and drain regions.