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US 6,308,938 B1Granted
Semiconductor integrated circuit device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorMichio Futakuchi
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit device having a ball grid array package includes a core material including a semiconductor chip and a sealing resin layer surrounding the chip and surface materials including a carrier base and a reinforcement in a sandwich structure for high stiffness against being and high reliability of connection to a printed wiring board even during heat cycling.
Claims23
A ball grid array semiconductor integrated circuit device comprising:
- a semiconductor chip having a plurality of connection pads;
- a carrier base having a first surface to which the semiconductor chip is mounted;
- a plurality of conductors, each conductor being electrically connected to a corresponding one of the connection pads, the conductors penetrating through the carrier base from the first surface to an opposite, second surface of the carrier base;
- a plurality of external connection terminals, each external connection terminal having a spherical shape, being disposed on the second surface of the carrier base, and being electrically connected to a corresponding one of the conductors;
- a sealing resin layer surrounding a periphery of the semiconductor chip;
- and
- a reinforcement base, wherein the semiconductor chip and the sealing resin layer form a core material, the carrier base and the reinforcement base are skin materials sandwiching the core material, the semiconductor chip is located centrally between the carrier base and the reinforcement base, and the carrier base and the reinforcement base have the same coefficient of thermal expansion whereby thermal stresses in the carrier base and the reinforcement base in response to temperature changes are substantially equal.
4 more elements
A semiconductor integrated circuit device comprising:
- a semiconductor chip having a plurality of connection pads;
- a plurality of conductors, each conductor being electrically connected to a corresponding one of the connection pads;
- a plurality of external connection terminals, each connection terminal having a spherical shape and corresponding, respectively, to a corresponding one of the conductors;
- a first insulating adhesive layer;
- a second insulating adhesive layer;
- a carrier base adhered to the semiconductor chip by the first insulating adhesive layer;
- and
- a reinforcement base adhered to the semiconductor chip by the second insulating adhesive layer, wherein the semiconductor chip, the first insulating adhesive layer, and the second insulating adhesive layer form a core material, the carrier base and the reinforcement base have substantially the same size as the semiconductor chip and are skin materials, sandwiching the core material, the connections of the conductors to the connection pads are located at a first surface of the carrier base, the conductors are located in the carrier base, and the external connection terminals are located at a second surface of the carrier base opposite the first surface.
5 more elements
A ball grid array semiconductor integrated circuit device comprising:
- a semiconductor chip having a plurality of connection pads;
- a plurality of conductors, each conductor being electrically connected to a corresponding one of the connection pads;
- a plurality of external connection terminals, each external connection terminal having a spherical shape and being electrically connected to a corresponding one of to the conductors;
- a sealing resin layer surrounding a periphery of the semiconductor chip;
- a carrier base having a first surface to which the semiconductor chip is mounted;
- and
- a reinforcement base, wherein the semiconductor chip and the sealing resin layer form a core material, the carrier base and the reinforcement base are skin materials sandwiching the core material, the conductors being located at least partly in the carrier base, the external connection terminals being located at a second surface, opposite the first surface, of the carrier base, the semiconductor chip is not located centrally between the carrier base and the reinforcement base, and the carrier base and the reinforcement base have differences in at least one of modulus of elasticity and thickness so that, as a result of the differences, thermal stresses in the carrier base and the reinforcement base in response to temperature changes are substantially equal.
4 more elements
Dependencies are inferred from the claim text.