Apparatus and method for compiling a plurality of instruction sets for a processor and a media for recording the compiling method

A compiling method for a processor having a plurality of different instruction sets, comprising:

• generating an intermediate code from a source program;
• and
• generating an object code by optimizing the intermediate code;
• wherein the generating of an intermediate code includes processing the source program by a plurality of analyzing steps;
• the method further including
• executing an optimizing process that does not depend upon an instruction set for the intermediate code and storing a result of the optimizing process;
• and
• executing an optimizing process that depends upon the instruction set for generating an object code for each of the plurality of different instruction sets.

A compiling apparatus for a processor having a plurality of different instruction sets, comprising:

• means for dividing a source program into a plurality of modules according to a predetermined unit;
• means for compiling the respective modules with respective ones of the plurality of different instructions sets;
• means for providing data for evaluating performance and code size based upon the module compilations with the respective ones of the plurality of different instructions sets;
• and
• means for selecting an optimum instruction set among the plurality of different instruction sets by comparing the evaluation data.

A compiling apparatus for a processor having a plurality of different instruction sets, comprising:

• means for generating an intermediate code form a source program;
• and
• means for generating an object code by optimizing the intermediate code;
• wherein the intermediate code generating means includes means for processing the source program by a plurality of analyzing steps;
• the apparatus further including:
• means for executing an optimizing process that does not depend upon an instruction set for the intermediate code and for storing a result of the optimizing process;
• and
• means for executing an optimizing process that depends upon the instruction set for generating an object code for each of the plurality of different instruction sets.

A storage media for storing a compiling method for a processor having a plurality of different instruction sets, comprising the steps of:

• dividing a source program into a plurality of modules according to a predetermined unit;
• compiling the respective modules with respective ones of the plurality of different instruction sets;
• providing data for evaluating performance and code size based upon the module compilations with the respective ones of the plurality of different instructions sets;
• selecting an optimum instruction set among the plurality of different instruction sets by comparing the valuation data;
• inserting a selection at a necessary portion for changing the instruction set;
• and
• outputting an object code in accordance with the instruction set changing command.