File driven mask insertion for automatic test equipment test pattern generation
AssigneeLSI Logic Corporation
InventorGene T. Fusco
Life of this patent
Estimating the term…
Abstract
A method, system, and program for selectively testing output signals of an integrated circuit. The system comprising a mask generation file specifying output signals and test cycles and a verification module to check simulation output data and generate test pattern data. The verification module further comprising an extractor routine which receives the mask generation file and processes the simulation output data such that the test pattern data is coded to mask the specified output signals at the specified test cycles. The verification module further comprising margin analysis for determining if margin times of the coded test patterns fall below a minimum margin time setting.
Claims22
A method for selectively testing an output signal of an integrated circuit, said method comprising:
- receiving a user-definable mask generation specification including said output signal;
- converting expected results of said integrated circuit into a test pattern;
- coding said test pattern to mask said output signal in accordance with said mask generation specification;
- testing said integrated circuit in accordance with said coded test pattern;
- and
- masking a result of said testing operation corresponding to said output signal.
A method of generating a test pattern to mask a first output signal during testing, said method comprising:
- reading a user-definable mask generation specification including said first output signal;
- generating a first entry in said test pattern coded to mask a test result of said first output signal in accordance with said mask generation specification;
- and
- generating a second entry in said test pattern coded to specify an expected result of a second output signal.
A system for selectively masking test results of output signals of an integrated circuit, said system comprising:
- a user-definable mask generation specification including an output signal;
- a verification module for receiving said mask generation specification;
- and
- a test pattern generated in accordance with said mask generation specification by said verification module to mask a test result of said specified output signal.
A program storage medium, readable by a computer, tangibly embodying a program of instructions executable by said computer for generating a test pattern to mask a first output signal during testing, the program comprising instructions for:
- reading a user-definable mask generation specification including said first output signal;
- generating a first entry in said test pattern coded to mask a test result of said first output signal in accordance with said mask generation specification;
- and
- generating a second entry in said test pattern coded to specify an expected result of a second output signal.
Dependencies are inferred from the claim text.