Page table entry management method and apparatus for a microkernel data processing system

In a data processing system including a memory and a processor that generates effective addresses for translation to a virtual address to be mapped into a physical address of a page of data in the memory, a method for managing the address translation, comprising:

• mapping a first virtual segment ID and a first effective address into a page table address for a page table in the memory;
• storing a page table entry at said page table address, said entry including said first virtual segment ID and a real page address to said physical page;
• accessing said physical page using said real address from said page table entry;
• copying said first virtual segment ID as an aliased virtual segment ID for a second effective address and storing it a second segment structure means in the memory;
• mapping said aliased virtual segment ID and said second effective address into said page table address for said page table in the memory;
• accessing said physical page in response to said second effective address, using said real address from said page table entry;
• evicting said page table entry and storing it in a page table entry cache;
• writing a first cache status value for said page table entry in a first cache status list accessible by said effective address;
• and
• writing a second cache status value for said page table entry in a second cache status list accessible by said physical address.

An address translation manager in a data processing system, comprising:

• a memory means in the data processing system, for storing real pages of information;
• a bus means coupled to the memory means;
• a processor means coupled to the memory means over said bus means, for generating an effective address and generating a virtual segment ID for translation to a virtual address to be mapped into a physical address of a page of data in the memory;
• a mapping means in the memory means, for translating an effective address and the virtual segment ID from the processor means into a page table entry that provides a real address of a page of information in the memory means;
• a page table means, for storing said page table entry;
• said processor means generating a second effective address to access said page in the memory;
• copying means for copying said virtual segment ID as an aliased virtual segment ID for said second effective address;
• said mapping means mapping the second effective address and the aliased virtual segment ID as said page table entry in said page table;
• a page table entry cache storage in the memory means, for storing page table entries evicted from the page table;
• a page table entry status list means in the memory, for identifying said evicted page table entries;
• said status list means including a first cache status value for a page table entry in a first cache status list accessible by said effective address and a second cache status value for said page table entry in a second cache status list accessible by said physical address;
• said page table entry cache storage receiving page table entries evicted from said page table when said page table is full, and returning said received page table entries to said page table when they are needed.

An address translation manager in a data processing system, comprising:

• a memory means in the data processing system, for storing real pages of information;
• a bus means coupled to the memory means;
• a processor means coupled to the memory means over said bus means, for generating an effective address for translation to a virtual address to be mapped into a physical address of a page of data in the memory;
• mapping means for mapping a first virtual segment ID and a first effective address into a page table address for a page table in the memory;
• storing means for storing a page table entry at said page table address, said entry including said first virtual segment ID and a real page address to said physical page;
• accessing means for accessing said physical page using said real address from said page table entry;
• copying means for copying said first virtual segment ID as an aliased virtual segment ID for a second effective address and storing it a second segment structure means in the memory;
• said mapping means mapping said aliased virtual segment ID and said second effective address into said page table address for said page table in the memory;
• said accessing means accessing said physical page in response to said second effective address, using said real address from said page table entry;
• means for evicting a page table entry and storing it in a page table entry cache;
• means for writing a first cache status value for said page table entry in a first cache status list accessible by said effective address;
• and
• means for writing a second cache status value for said page table entry in a second cache status list accessible by said physical address.

A computer program product in a computer readable medium for generating effective addresses for translation to a virtual address to be mapped into a physical address of a page of data in the memory, comprising:

• means for mapping a first effective address and a first virtual segment ID as a first page table entry and loading it into a page table;
• means for copying said first virtual segment ID as an aliased virtual segment ID for a second effective address;
• means for mapping the second effective address and the aliased virtual segment ID as said first page table entry in said page table;
• means for determining that the page table cannot accept an additional page table entry;
• means for evicting said first page table entry and storing it in a page table entry cache;
• means for writing a first cache status value for said page table entry in a first cache status list accessible by said effective address;
• means for writing a second cache status value for said page table entry in a second cache status list accessible by said physical address;
• means for mapping a third effective address as a second page table entry and loading it into the page table.

A computer program product in a computer readable medium for generating effective addresses for translation to a virtual address to be mapped into a physical address of a page of data in the memory, comprising:

• means for mapping a first virtual segment ID and a first effective address into a page table address for a page table in the memory;
• means for storing a page table entry at said page table address, said entry including said first virtual segment ID and a real page address to said physical page;
• means for accessing said physical page using said real address from said page table entry;
• means for copying said first virtual segment ID as an aliased virtual segment ID for a second effective address and storing it a second segment structure means in the memory;
• means for mapping said aliased virtual segment ID and said second effective address into said page table address for said page table in the memory;
• means for accessing said physical page in response to said second effective address, using said real address from said page table entry;
• means for evicting said first page table entry and storing it in a page table entry cache:
• means for writing a first cache status value for said first page table entry in a first cache status list accessible by said effective address;
• and
• means for writing a second cache status value for said first page table entry in a second cache status list accessible by said physical address.