Methods and apparatus for adaptive filters

An adaptive filter for use with a digital signal processor, said digital signal processor for processing an input signal as a digital representation thereof, said adaptive filter comprising:

• means for receiving said digital representation as a serial input signal;
• means for converting said serial input signal into a parallel input signal;
• means for receiving a desired response signal, said desired response signal being a desired representation about-which said adaptive filter converges;
• means for combining said desired response signal with a feedback input signal into an error signal;
• means for combining said error signal and said parallel input signal into a combined signal;
• a single multiplier, a single adder and a single multiplier-accumulator, said combined signal being supplied to at least one of said single multiplier, adder and multiplier-accumulator, an output of said adder and said multiplier being supplied to said means for combining said error signal and said parallel input signal into said combined signal, an output of said multiplier-accumulator being a parallel output signal convergent upon said desired response signal, said parallel output signal being said feedback input signal;
• a signal bus for supplying said combined signal to said at least one of said single multiplier, adder and multiplier-accumulator;
• at least one multiplexer between said signal bus and each of said single multiplier, adder and multiplier-accumulator;
• a state machine controller for providing synchronization on said at least one multiplexer;
• and
• means for converting said parallel output signal into a serial output signal.

A method for processing an input signal in an adaptive filter, comprising the steps:

• supplying said input signal to said adaptive filter in a serial manner;
• converting said input signal into a parallel input signal;
• supplying a desired response signal to said adaptive filter in a serial manner;
• converting said desired response signal into a parallel representation thereof;
• effecting an adaptive filter algorithm on said parallel input signal to achieve a parallel output signal, said parallel output signal being convergent upon said desired response signal, wherein said step of effecting said adaptive filter algorithm on said parallel input signal further comprises:
• a. providing said parallel input signal to first inputs of a plurality of storage elements, each of said plurality of storage elements being operatively coupled to a common bus via a plurality of outputs from said plurality of storage elements;
• b. providing an error signal resulting from a combination of said desired response signal and said parallel output signal to second inputs of said plurality of storage elements;
• and
• c. selectively supplying via said common bus one of said plurality of outputs from said storage elements to one of a multiplier, an adder, and a multiplier-accumulator;
• converting said parallel output signal into a serial output signal;
• and
• supplying said serial output signal from said adaptive filter.