Phase error detector

A phase error detector for use in a demodulator recovering a carrier signal from a received signal, using the recovered carrier signal to demodulate the received signal, thereby obtaining an in-phase demodulated signal and a quadrature demodulated signal, comprising:

• a first data decision circuit determining first transmitted data values represented by said in-phase demodulated signal;
• a first subtractor coupled to said first data decision circuit, taking a difference between said in-phase demodulated signal and said first transmitted data values, thereby generating a first difference signal;
• a first sign estimator coupled to said first subtractor, using said quadrature demodulated signal and said first difference signal to estimate whether said recovered carrier signal leads or lags a correct phase, thereby generating a first sign signal;
• a first gain setting circuit multiplying said in-phase demodulated signal by a constant gain, thereby generating a first product signal;
• a first sign setting circuit coupled to said first gain setting circuit and said first sign estimator, reversing a polarity of said first product signal according to said first sign signal, thereby generating a first signed product signal;
• a first adder coupled to said first sign setting circuit, adding said first signed product signal to said quadrature demodulated signal, thereby generating a first sum;
• a first divider coupled to said first adder, dividing said first difference signal by said first sum, thereby generating a first estimated phase error;
• a second data decision circuit determining second transmitted data values represented by said quadrature demodulated signal;
• a second subtractor coupled to said second data decision circuit, taking a difference between said quadrature demodulated signal and said second transmitted data values, thereby generating a second difference signal;
• a second sign estimator coupled to said second subtractor, using said in-phase demodulated signal and said second difference signal to estimate whether said recovered carrier signal leads or lags said correct phase, thereby generating a second sign signal;
• a second gain setting circuit multiplying said quadrature demodulated signal by a constant gain, thereby generating a second product signal;
• a second sign setting circuit coupled to said second gain setting circuit and said second sign estimator, reversing a polarity of said second product signal according to said second sign signal, thereby generating a second signed product signal;
• a second adder coupled to said second sign setting circuit, adding said second signed product signal to a two's complement of said in-phase demodulated signal, thereby generating a second sum;
• a second divider coupled to said second adder, dividing said second difference signal by said second sum, thereby generating a second estimated phase error;
• an averaging circuit coupled to said first divider and said second divider, taking an average of said first estimated phase error and said second estimated phase error, thereby generating an average phase error;
• and
• an output selector coupled to said averaging circuit, receiving a mode signal designating a first mode in which said in-phase demodulated signal includes transmitted data, and a second mode in which said in-phase demodulated signal and said quadrature demodulated signal both include transmitted data, selecting said first estimated phase error for output from said phase detector in said first mode, and selecting said average phase error for output from said phase detector in said second mode.

A method of estimating phase error in a demodulator recovering a carrier signal from a received signal, using the recovered carrier signal to demodulate the received signal, thereby obtaining an in-phase demodulated signal representing transmitted data values, also obtaining a quadrature demodulated signal, comprising the steps of:

• determining the transmitted data values represented by said in-phase demodulated signal;
• taking a difference between said in-phase demodulated signal and said transmitted data values, thereby generating a difference signal;
• estimating, from said quadrature demodulated signal and said difference signal, whether said recovered carrier signal leads or lags a correct phase, thereby generating a sign signal;
• multiplying said in-phase demodulated signal by a constant gain, thereby generating a product signal;
• reversing a polarity of said product signal according to said sign signal, thereby generating a signed product signal;
• adding said signed product signal to said quadrature demodulated signal, thereby generating a sum;
• and
• dividing said difference signal by said sum, thereby estimating said phase error.

A method of detecting phase error in a demodulator recovering a carrier signal from a received signal, using the recovered carrier signal to demodulate the received signal, thereby obtaining an in-phase demodulated signal and a quadrature demodulated signal, comprising the steps of:

• receiving a mode signal designating a first mode in which said in-phase demodulated signal includes transmitted data, and a second mode in which said in-phase demodulated signal and said quadrature demodulated signal both include transmitted data;
• determining first transmitted data values represented by said in-phase demodulated signal;
• taking a difference between said in-phase demodulated signal and said first transmitted data values, thereby generating a first difference signal;
• estimating, from said quadrature demodulated signal and said first difference signal, whether said recovered carrier signal leads or lags a correct phase, thereby generating a first sign signal;
• multiplying said in-phase demodulated signal by a constant gain, thereby generating a first product signal;
• reversing a polarity of said first product signal according to said first sign signal, thereby generating a first signed product signal;
• adding said first signed product signal to said quadrature demodulated signal, thereby generating a first sum;
• dividing said first difference signal by said first sum, thereby generating a first estimated phase error;
• determining second transmitted data values represented by said quadrature demodulated signal in said second mode;
• taking a difference between said quadrature demodulated signal and said second transmitted data values, thereby generating a second difference signal;
• estimating, from said in-phase demodulated signal and said second difference signal, whether said recovered carrier signal leads or lags a correct phase, thereby generating a second sign signal;
• multiplying said quadrature demodulated signal by a constant gain, thereby generating a second product signal;
• reversing a polarity of said second product signal according to said second sign signal, thereby generating a second signed product signal;
• adding said second signed product signal to a two's complement of said in-phase demodulated signal, thereby generating a second sum;
• dividing said second difference signal by said second sum, thereby generating a second estimated phase error;
• taking an average of said first estimated phase error and said second estimated phase error, thereby generating an average phase error;
• selecting said first estimated phase error for output from said phase detector in said first mode;
• and
• selecting said average phase error for output from said phase detector in said second mode.