High performance semiconductor memory device with low power consumption

Abstract

A semiconductor memory device accessed with wordlines and bitlines has memory cells which operate at high performance with lower power consumption and have a high density. Each of the memory cells has pass transistors connected to a corresponding wordline and a corresponding pair of bitlines, and the pass transistors are gated by a signal of the corresponding wordline. The semiconductor memory device includes a wordline drive unit for selectively driving the wordlines in response to a row address. A wordline driver in the wordline drive unit boosts a corresponding wordline in a positive direction when the corresponding wordline is activated to access the memory cell and boosts the corresponding wordline in a negative direction when the corresponding wordline is inactive. By boosting the wordline in the positive direction, the performance of the memory cells is enhanced, and by boosting the wordline in the negative direction, a leakage current in the pass transistors with a low-threshold voltage is prevented.

Dependencies are inferred from the claim text.