Dynamic random access memory suitable for use as a compatible transistor of a static random access memory and the method for operating the same
OwnerPlen Chieninventor
Life of this patent
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Abstract
A dynamic random access memory suitable for use as a compatible transistor of a static random access memory and the method for operating the same. A static random access memory with a single transistor is applied to effectively store the data saved in the dynamic random access memory without being lost. In addition, the dynamic random access memory can be operated under a low voltage to retain the data stored in the dynamic random access memory cell, and to reduce the power consumption. With the structure of such dynamic random access memory, the data stored in the dynamic random access memory can be retained under the stand-by mode, and the operation power consumption can be reduced.
Claims21
A dynamic random access memory structure suitable for use as a compatible transistor in a static random access memory, wherein the dynamic random access memory structure is operated under a normal operation mode and a low voltage operation mode, and uses a reference clock signal as an operation accordance, the dynamic random access memory comprising:
- a memory cell, to store a data;
- a sense amplifier, comprising sense unit, a first transistor and a second transistor, wherein the sense unit is connected to the first transistor, the second transistor, a bit line and a complementary bit line, the bit line and the complementary bit line are used to access and refresh the data stored in the memory cell, and a frequency for refreshing the data stored in the memory cell is according to the reference clock signal;
- and
- a switch, to receive a first voltage and a second voltage, and to select one of the first and the second voltages, wherein the first voltage has a voltage level higher than a voltage level of the second voltage;
- wherein
- when the dynamic random access memory structure is operated under the normal operation mode, the second voltage is an operation voltage to provide the operation of the dynamic random access memory structure to reduce power consumption;
- and
- when the dynamic random access memory structure is operated under the low voltage operation mode, the first voltage is the operation voltage to retain the data stored in the memory cell.
A dynamic random access memory structure suitable for use as a compatible transistor of a static random access memory, wherein the dynamic random access memory structure is operated under one of either a normal operation mode, a stand-by mode or a sleep mode according to a reference clock signal, the dynamic random access memory comprising:
- a memory cell, to store a data;
- a sense amplifier, comprising a sense unit, a first transistor and a second transistor, the sense unit is coupled to the first transistor, the second transistor, a bit line and a complementary bit line, wherein the bit line and the complementary bit line are used to access and refresh the data stored in the memory cell, a frequency for refreshing the data stored in the memory cell is according to the reference clock signal;
- and
- a switch, to receive a first voltage and a second voltage, and to switch between one of the first and the second voltage as an operation voltage, wherein the first voltage is higher than the second voltage, and wherein
- when the dynamic random access memory structure is operated under the normal operation mode, the operation voltage is the second voltage to provide the operation of the dynamic random access memory structure and to save operation power consumption;
- when the dynamic random access memory structure is operated under the stand-by mode, the voltage is adjusted as the first or the second voltage according to the reference clock signal;
- and
- when the dynamic random access memory structure is operated under the sleep mode, the operation voltage is fixed as the first voltage to provide the operation of the dynamic random access memory structure, and to maintain the data stored in the memory cell.
A method of operating a dynamic random access memory structure as a compatible transistor of a static random access memory, wherein the dynamic random access memory structure comprises a memory cell, a sense amplifier and a switch, the dynamic random access memory structure is operated under either a normal operation mode or a low voltage operation mode, the method comprising:
- providing a first voltage and a second voltage, and switching between the first and the second voltages as an operation voltage, wherein the first voltage is higher than the second voltage;
- providing a reference clock signal as an operation signal for the operation;
- refreshing a data stored in the memory cell according to a sequence frequency of the reference clock signal;
- providing the second voltage as the operation voltage under the normal operation mode to provide the operation of the dynamic random access memory structure to save the operation power consumption;
- and
- providing the first voltage as the operation voltage under the low voltage operation mode to provide the operation of the dynamic random access memory structure and to retain the data stored in the memory cell.
A method of operating a dynamic random access memory structure as a compatible transistor of a static random access memory, the dynamic random access memory structure comprising a memory cell, a sense amplifier and a switch, the dynamic random access memory structure being operated under one of a normal operation mode, a stand-by mode and a sleep mode, the method comprising:
- providing a first voltage and a second voltage, and switching between the first and the second voltages as an operation voltage, wherein the first voltage is higher than the second voltage;
- providing a reference clock signal as an operation signal of the method;
- storing a data in the memory cell,
- refreshing the data stored in the memory cell according to a sequence frequency of the reference clock signal;
- providing the second voltage as the operation voltage under the normal operation mode to providing the operation of the dynamic random access memory structure and to save power consumption;
- providing the first or the second voltage as the operation voltage under the stand-by mode according to the reference clock signal;
- and
- providing the first voltage as the operation voltage under the sleep mode to provide the operation of the dynamic random access memory structure and to retain the data stored in the memory cell.
Dependencies are inferred from the claim text.